AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 342

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AT91SAM7S32-AI

Manufacturer Part Number
AT91SAM7S32-AI
Description
AT91 ARM Thumb-based Microcontrollers
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Pin Name List
Product
Dependencies
I/O Lines
Power
Management
Interrupt
Functional
Description
TC Description
16-bit Counter
342
AT91SAM7S32 Preliminary
Table 74. Signal Name Description
Table 75. TC pin list
The pins used for interfacing the compliant external devices may be multiplexed with PIO
lines. The programmer must first program the PIO controllers to assign the TC pins to their
peripheral functions.
The TC is clocked through the Power Management Controller (PMC), thus the programmer
must first configure the PMC to enable the Timer/Counter clock.
The TC has an interrupt line connected to the Advanced Interrupt Controller (AIC). Handling
the TC interrupt requires programming the AIC before configuring the TC.
The three channels of the Timer/Counter are independent and identical in operation. The reg-
isters for channel programming are listed in Table 77 on page 354.
Each channel is organized around a 16-bit counter. The value of the counter is incremented at
each positive edge of the selected clock. When the counter has reached the value 0xFFFF
and passes to 0x0000, an overflow occurs and the COVFS bit in TC_SR (Status Register) is
set.
The current value of the counter is accessible in real time by reading the Counter Value Regis-
ter, TC_CV. The counter can be reset by a trigger. In this case, the counter value passes to
0x0000 on the next valid edge of the selected clock.
Pin Name
TCLK0-TCLK2
TIOA0-TIOA1
TIOB0-TIOB1
Block/Channel
Channel Signal
XC0, XC1, XC2
Signal Name
SYNC
TIOA
TIOB
INT
I/O Line A
I/O Line B
External Clock Input
Description
Description
External Clock Inputs
Capture Mode: Timer/Counter Input
Waveform Mode: Timer/Counter Output
Capture Mode: Timer/Counter Input
Waveform Mode: Timer/Counter Input/output
Interrupt Signal Output
Synchronization Input Signal
Type
Input
I/O
I/O
6071A–ATARM–28-Oct-04

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