AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 281

• Manufacturer Part Number: AT91SAM7S32-AI
• Description: AT91 ARM Thumb-based Microcontrollers
• Manufacturer: ATMEL [ATMEL Corporation]

Transmit Break
6071A–ATARM–28-Oct-04
Figure 113. Framing Error Status
The user can request the transmitter to generate a break condition on the TXD line. A break
condition drives the TXD line low during at least one complete character. It appears the same
as a 0x00 character sent with the parity and the stop bits at 0. However, the transmitter holds
the TXD line at least during one character until the user requests the break condition to be
removed.
A break is transmitted by writing the Control Register (US_CR) with the STTBRK bit at 1. This
can be performed at any time, either while the transmitter is empty (no character in either the
Shift Register or in US_THR) or when a character is being transmitted. If a break is requested
while a character is being shifted out, the character is first completed before the TXD line is
held low.
Once STTBRK command is requested further STTBRK commands are ignored until the end of
the break is completed.
The break condition is removed by writing US_CR with the STPBRK bit at 1. If the STPBRK is
requested before the end of the minimum break duration (one character, including start, data,
parity and stop bits), the transmitter ensures that the break condition completes.
The transmitter considers the break as though it is a character, i.e. the STTBRK and STPBRK
commands are taken into account only if the TXRDY bit in US_CSR is at 1 and the start of the
break condition clears the TXRDY and TXEMPTY bits as if a character is processed.
Writing US_CR with the both STTBRK and STPBRK bits at 1 can lead to an unpredictable
result. All STPBRK commands requested without a previous STTBRK command are ignored.
A byte written into the Transmit Holding Register while a break is pending, but not started, is
ignored.
After the break condition, the transmitter returns the TXD line to 1 for a minimum of 12 bit
times. Thus, the transmitter ensures that the remote receiver detects correctly the end of
break and the start of the next character. If the timeguard is programmed with a value higher
than 12, the TXD line is held high for the timeguard period.
After holding the TXD line for this period, the transmitter resumes normal operations.
Figure 114 illustrates the effect of both the Start Break (STTBRK) and Stop Break (STP BRK)
commands on the TXD line.
Baud Rate
FRAME
RXRDY
US_CR
Clock
Write
RXD
Start
Bit
D0
D1
D2
D3
AT91SAM7S32 Preliminary
D4
D5
D6
D7
Parity
Bit
Stop
Bit
RSTSTA = 1
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