AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 12

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AT91SAM7S32-AI

Manufacturer Part Number
AT91SAM7S32-AI
Description
AT91 ARM Thumb-based Microcontrollers
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Peripheral Data
Controller
12
AT91SAM7S32 Preliminary
Handles data transfer between peripherals and memories
Nine channels
Low bus arbitration overhead
Next Pointer management for reducing interrupt latency requirements
Two for the USART
Two for the Debug Unit
Two for the Serial Synchronous Controller
Two for the Serial Peripheral Interface
One for the Analog-to-digital Converter
One Master Clock cycle needed for a transfer from memory to peripheral
Two Master Clock cycles needed for a transfer from peripheral to memory
6071A–ATARM–28-Oct-04

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