AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 76

• Manufacturer Part Number: AT91SAM7S32-AI
• Description: AT91 ARM Thumb-based Microcontrollers
• Manufacturer: ATMEL [ATMEL Corporation]

Watchdog Timer Mode Register
Register Name: WDT_MR
Access Type:
• WDV: Watchdog Counter Value
Defines the value loaded in the 12-bit Watchdog Counter.
• WDFIEN: Watchdog Fault Interrupt Enable
0: A Watchdog fault (underflow or error) has no effect on interrupt.
1: A Watchdog fault (underflow or error) asserts interrupt.
• WDRSTEN: Watchdog Reset Enable
0: A Watchdog fault (underflow or error) has no effect on the resets.
1: A Watchdog fault (underflow or error) triggers a Watchdog reset.
• WDRPROC: Watchdog Reset Processor
0: If WDRSTEN is 1, a Watchdog fault (underflow or error) activates all resets.
1: If WDRSTEN is 1, a Watchdog fault (underflow or error) activates the processor reset.
• WDD: Watchdog Delta Value
Defines the permitted range for reloading the Watchdog Timer.
If the Watchdog Timer value is less than or equal to WDD, writing WDT_CR with WDRSTT = 1 restarts the timer.
If the Watchdog Timer value is greater than WDD, writing WDT_CR with WDRSTT = 1 causes a Watchdog error.
• WDDBGHLT: Watchdog Debug Halt
0: The Watchdog runs when the processor is in debug state.
1: The Watchdog stops when the processor is in debug state.
• WDIDLEHLT: Watchdog Idle Halt
0: The Watchdog runs when the system is in idle mode.
1: The Watchdog stops when the system is in idle state.
• WDDIS: Watchdog Disable
0: Enables the Watchdog Timer.
1: Disables the Watchdog Timer.
76
WDDIS
31
23
15
–
7
AT91SAM7S32 Preliminary
WDRPROC
Read / Write Once
30
22
14
–
6
WDIDLEHLT
WDRSTEN
29
21
13
5
WDDBGHLT
WDFIEN
28
20
12
4
WDD
WDV
27
19
11
3
26
18
10
2
WDD
WDV
25
17
9
1
6071A–ATARM–28-Oct-04
24
16
8
0