AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 327

• Manufacturer Part Number: AT91SAM7S32-AI
• Description: AT91 ARM Thumb-based Microcontrollers
• Manufacturer: ATMEL [ATMEL Corporation]

• START: Receive Start Selection
• STTDLY: Receive Start Delay
If STTDLY is not 0, a delay of STTDLY clock cycles is inserted between the start event and the actual start of reception.
When the Receiver is programmed to start synchronously with the Transmitter, the delay is also applied.
Please Note: It is very important that STTDLY be set carefully. If STTDLY must be set, it should be done in relation to TAG
(Receive Sync Data) reception.
• PERIOD: Receive Period Divider Selection
This field selects the divider to apply to the selected Receive Clock in order to generate a new Frame Sync Signal. If 0, no
PERIOD signal is generated. If not 0, a PERIOD signal is generated each 2 x (PERIOD+1) Receive Clock.
6071A–ATARM–28-Oct-04
0x8-0xF
START
0x0
0x1
0x2
0x3
0x4
0x5
0x6
0x7
Continuous, as soon as the receiver is enabled, and immediately after the end of transfer of the previous data.
Transmit Start
Detection of a low level on RF input
Detection of a high level on RF input
Detection of a falling edge on RF input
Detection of a rising edge on RF input
Detection of any level change on RF input
Detection of any edge on RF input
Reserved
Receive Start
AT91SAM7S32 Preliminary
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