AT91SAM9G45-EKES Atmel, AT91SAM9G45-EKES Datasheet - Page 259
AT91SAM9G45-EKES
Manufacturer Part Number
AT91SAM9G45-EKES
Description
KIT EVAL FOR AT91SAM9G45
Manufacturer
Atmel
Series
AT91SAM Smart ARMr
Type
MCUr
Datasheets
1.AT91SAM9G45-EKES.pdf
(56 pages)
2.AT91SAM9G45-EKES.pdf
(1218 pages)
3.AT91SAM9G45-EKES.pdf
(66 pages)
Specifications of AT91SAM9G45-EKES
Contents
Board
Processor To Be Evaluated
SAM9G45
Data Bus Width
32 bit
Interface Type
I2C, SPI, UART
Maximum Operating Temperature
+ 50 C
Minimum Operating Temperature
- 10 C
Operating Supply Voltage
1.8 V to 3.3 V
For Use With/related Products
AT91SAM9G45
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q4626953
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The DDRSDRC is programmed using the registers listed in
Table 22-9.
6438F–ATARM–21-Jun-10
Offset
0x00
0x58-0xE0
0x04
0x08
0x0C
0x10
0x14
0x18
0x1C
0x20
0x24
0x2C
0x34
0x38
0x3C
0x40
0x44
0x48-0x4C
0xE4
0xE8
Register Mapping
Register
DDRSDRC Mode Register
DDRSDRC Refresh Timer Register
DDRSDRC Configuration Register
DDRSDRC Timing0 Register
DDRSDRC Timing1 Register
DDRSDRC Timing2 Register
Reserved
DDRSDRC Low-power Register
DDRSDRC Memory Device Register
DDRSDRC DLL Information Register
DDRSDRC High Speed Register
DDRSDRC Delay I/O Register
DDRSDRC Delay I/O Register
DDRSDRC Delay I/O Register
DDRSDRC Delay I/O Register
Reserved
Reserved
Reserved
DDRSDRC Write Protect Mode Register
DDRSDRC Write Protect Status Register
Name
DDRSDRC_MR
DDRSDRC_RTR
DDRSDRC_CR
DDRSDRC_T0PR
DDRSDRC_T1PR
DDRSDRC_T2PR
–
DDRSDRC_LPR
DDRSDRC_MD
DDRSDRC_DLL
DDRSDRC_HS
DDRSDRC_DELAY1
DDRSDRC_DELAY2
DDRSDRC_DELAY3
DDRSDRC_DELAY4
–
-
–
DDRSDRC_WPMR
DDRSDRC_WPSR
Table
22-9.
Access
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
–
Read-write
Read-write
Read-only
Read-write
Read-write
Read-write
Read-write
Read-write
–
-
–
Read-write
Read-only
AT91SAM9G45
Reset
0x00000000
0x00000000
0x7024
0x20227225
0x3c80808
0x2062
–
0x10000
0x10
0x00000001
0x0
0x00000000
0x00000000
0x00000000
0x00000000
–
-
–
0x00000000
0x00000000
259
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