AT91SAM9G45-EKES Atmel, AT91SAM9G45-EKES Datasheet - Page 272

KIT EVAL FOR AT91SAM9G45

AT91SAM9G45-EKES

Manufacturer Part Number
AT91SAM9G45-EKES
Description
KIT EVAL FOR AT91SAM9G45
Manufacturer
Atmel
Series
AT91SAM Smart ARMr
Type
MCUr

Specifications of AT91SAM9G45-EKES

Contents
Board
Processor To Be Evaluated
SAM9G45
Data Bus Width
32 bit
Interface Type
I2C, SPI, UART
Maximum Operating Temperature
+ 50 C
Minimum Operating Temperature
- 10 C
Operating Supply Voltage
1.8 V to 3.3 V
For Use With/related Products
AT91SAM9G45
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q4626953
22.7.9
Name:
Access:
Reset:
The DLL logic is internally used by the controller in order to delay DQS inputs. This is necessary to center the strobe time
and the data valid window.
• MDINC: DLL Master Delay Increment
0 = The DLL is not incrementing the Master delay counter.
1 = The DLL is incrementing the Master delay counter.
• MDDEC: DLL Master Delay Decrement
0 = The DLL is not decrementing the Master delay counter.
1 = The DLL is decrementing the Master delay counter.
• MDOVF
0 = The Master delay counter has not reached its maximum value, or the Master is not locked yet.
1 = The Master delay counter has reached its maximum value, the Master delay counter increment is stopped and the DLL
forces the Master lock. If this flag is set, it means the DDRSDRC clock frequency is too low compared to Master delay line
number of elements.
• MDVAL
Value of the Master delay counter.
6438F–ATARM–21-Jun-10
31
23
15
7
:
:
DDRSDRC DLL Register
DLL Master Delay Value
DLL Master Delay Overflow Flag
DDRSDRC_DLL
Read-only
See
Table 22-9
30
22
14
6
29
21
13
5
28
20
12
4
MDVAL
27
19
11
3
MDOVF
26
18
10
2
AT91SAM9G45
MDDEC
25
17
9
1
MDINC
24
16
8
0
272

Related parts for AT91SAM9G45-EKES