AT91SAM9G45-EKES Atmel, AT91SAM9G45-EKES Datasheet - Page 624
AT91SAM9G45-EKES
Manufacturer Part Number
AT91SAM9G45-EKES
Description
KIT EVAL FOR AT91SAM9G45
Manufacturer
Atmel
Series
AT91SAM Smart ARMr
Type
MCUr
Datasheets
1.AT91SAM9G45-EKES.pdf
(56 pages)
2.AT91SAM9G45-EKES.pdf
(1218 pages)
3.AT91SAM9G45-EKES.pdf
(66 pages)
Specifications of AT91SAM9G45-EKES
Contents
Board
Processor To Be Evaluated
SAM9G45
Data Bus Width
32 bit
Interface Type
I2C, SPI, UART
Maximum Operating Temperature
+ 50 C
Minimum Operating Temperature
- 10 C
Operating Supply Voltage
1.8 V to 3.3 V
For Use With/related Products
AT91SAM9G45
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q4626953
- Current page: 624 of 1218
- Download datasheet (19Mb)
• CHRL: Character Length.
• SYNC/CPHA: Synchronous Mode Select or SPI Clock Phase
SYNC = 0: USART operates in Asynchronous Mode.
SYNC = 1: USART operates in Synchronous Mode.
CPHA = 0: Data is changed on the leading edge of SPCK and captured on the following edge of SPCK.
CPHA = 1: Data is captured on the leading edge of SPCK and changed on the following edge of SPCK.
CPHA determines which edge of SPCK causes data to change and which edge causes data to be captured. CPHA is used
with CPOL to produce the required clock/data relationship between master and slave devices.
• PAR: Parity Type
• NBSTOP: Number of Stop Bits
• CHMODE: Channel Mode
624
0
0
1
1
0
0
0
0
0
1
1
– If USART does not operate in SPI Mode (USART_MODE is
– If USART operates in SPI Mode (USART_MODE = 0xE or 0xF):
CHMODE
0
0
1
1
NBSTOP
AT91SAM9G45
CHRL
PAR
0
0
1
1
0
1
0
1
0
1
0
0
1
0
1
Asynchronous (SYNC = 0)
1 stop bit
1.5 stop bits
2 stop bits
Reserved
Mode Description
Normal Mode
0
1
0
1
x
x
Character Length
5 bits
6 bits
7 bits
8 bits
Parity Type
Even parity
Odd parity
Parity forced to 0 (Space)
Parity forced to 1 (Mark)
No parity
Multidrop mode
0xE and 0xF):
Synchronous (SYNC = 1)
1 stop bit
Reserved
2 stop bits
Reserved
6438F–ATARM–21-Jun-10
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