AT89LP6440-20JU Atmel, AT89LP6440-20JU Datasheet - Page 149

• Manufacturer Part Number: AT89LP6440-20JU
• Description: MCU 8051 64K FLASH ISP 44PLCC
• Manufacturer: Atmel
• Series: 89LPr

Specifications of AT89LP6440-20JU

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 38
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 8K x 8
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• Processor Series: AT89x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 8 KB
• Interface Type: 2-Wire, SPI
• Maximum Clock Frequency: 24 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: AT89ISP
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

22.1.5
22.1.6
3706A–MICRO–9/09
Description: INC /DPTR increments the unselected 16-bit data pointer by 1. A 16-bit increment (modulo 216 ) is performed,
Description: JMP @A+PC adds the eight-bit unsigned contents of the Accumulator to the program counter, which is first
Operation: INC
Operation: JMP
Encoding:
Encoding:
Function: Increment Alternate Data Pointer
Function: Jump indirect relative to PC
INC /DPTR
JMP @A+PC
Example: Registers DP1H and DP1L contain 12H and 0FEH, respectively, and DPS = 0. The following instruction
Example: An even number from 0 to 6 is in the Accumulator. The following sequence of instructions branches to one of four
Cycles: 3
Cycles: 3
Bytes: 2
Bytes: 2
and an overflow of the low-order byte of the data pointer from 0FFH to 00H increments the high-order byte. No
flags are affected.
sequence,
INC
INC
INC
changes DP1H and DP1L to 13H and 01H.
IF (DPS) = 0
THEN
ELSE
incremented by two. This is the address for subsequent instruction fetches. Sixteen-bit addition is performed
(modulo 2
Accumulator is not altered. No flags are affected.
AJMP instructions in a jump table starting at JMP_TBL.
JMP_TBL:
If the Accumulator equals 04H when starting this sequence, execution jumps to label LABEL2. Because AJMP is
a 2-byte instruction, the jump instructions start at every other address.
(PC) ← (A) + (PC) + 2
A5
A5
(DPTR1) ← (DPTR1) + 1
(DPTR0) ← (DPTR0) + 1
/DPTR
/DPTR
/DPTR
JMP
AJMP LABEL0
AJMP LABEL1
AJMP LABEL2
AJMP LABEL3
16
): a carry-out from the low-order eight bits propagates through the higher-order bits. The
@A + PC
1
0
0
1
1
1
0
1
0
0
0
0
AT89LP6440 - Preliminary
1
1
1
1
149