HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 128

• Manufacturer Part Number: HD64F7051SFJ20V
• Description: MCU 5V 256K J-TEMP PB-FREE QFP-1
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7050r

Specifications of HD64F7051SFJ20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, WDT
• Number Of I /o: 102
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 168-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 7 User Break Controller (UBC)
7.4.2
1. Register settings:
A user break interrupt occurs when word data is written into address H'00123456.
2. Register settings:
A user break interrupt does not occur because the word access was performed on an even address.
7.4.3
1. Register settings:
A user break interrupt occurs when longword data is read from address H'0076BCDC.
2. Register settings:
A user break interrupt does not occur because no instruction fetch is performed in the DMA/CTC
cycle.
Rev. 5.00 Jan 06, 2006 page 106 of 818
REJ09B0273-0500
Conditions set:
Conditions set:
Conditions set:
Conditions set:
Break on CPU Data Access Cycle
Break on DMA/DTC Cycle
UBARH = H'0012
UBARL = H'3456
UBBR = H'006A
Address: H'00123456
Bus cycle: CPU, data access, write, word
UBARH = H'00A8
UBARL = H'0391
UBBR = H'0066
Address: H'00A80391
Bus cycle: CPU, data access, read, word
UBARH = H'0076
UBARL = H'BCDC
UBBR = H'00A7
Address: H'0076BCDC
Bus cycle: DMA, data access, read, longword
UBARH = H'0023
UBARL = H'45C8
UBBR = H'0094
Address: H'002345C8
Bus cycle: DMA, instruction fetch, read
(operand size not included in conditions)