HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 252

• Manufacturer Part Number: HD64F7051SFJ20V
• Description: MCU 5V 256K J-TEMP PB-FREE QFP-1
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7050r

Specifications of HD64F7051SFJ20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, WDT
• Number Of I /o: 102
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 168-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 10 Advanced Timer Unit (ATU)
Bit 2:
IOxx2
0
1
Timer I/O Control Registers 3A, 3B, 4A, 4B, 5A (TIOR3A, TO0R3B, TIOR4A, TIOR4B,
TIOR5A)
Timer I/O control registers 3A, 3B, 4A, 4B, and 5A (TIOR3A, TO0R3B, TIOR4A, TIOR4B,
TIOR5A) are 8-bit registers. There are five TIOR registers, two each for channels 3 and 4, and one
for channel 5.
TIOR3A and TIOR3B are 8-bit readable/writable registers. When bit 0 of TMDR is 0, they
specify whether general registers GR3A to GR3D are used as input capture or compare-match
registers, and also perform edge detection and output value setting. Also, when bit 0 of TMDR is
0, they select enabling or disabling of free-running counter (TCNT3) clearing.
Rev. 5.00 Jan 06, 2006 page 230 of 818
REJ09B0273-0500
Initial value:
Initial value:
Bit 1:
IOxx1
0
1
0
1
TIOR3A
TIOR3B
R/W:
R/W:
Bit:
Bit:
Bit 0:
IOxx0
0
1
0
1
0
1
0
1
CCI3D
CCI3B
R/W
R/W
7
0
7
0
Description
GR is an output
compare register
GR is input capture
register
IO3D2
IO3B2
R/W
R/W
6
0
6
0
IO3D1
IO3B1
R/W
R/W
5
0
5
0
IO3D0
IO3B0
R/W
R/W
4
0
4
0
0 output regardless of compare-match
0 output on GR compare-match
1 output on GR compare-match
Toggle output on GR compare-match
Input capture disabled
Input capture in GR on rising edge
Input capture in GR on falling edge
Input capture in GR on both rising and
falling edges
CCI3C
CCI3A
R/W
R/W
3
0
3
0
IO3C2
IO3A2
R/W
R/W
2
0
2
0
IO3C1
IO3A1
R/W
R/W
1
0
1
0
(Initial value)
IO3C0
IO3A0
R/W
R/W
0
0
0
0