HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 589

MCU 5V 256K J-TEMP PB-FREE QFP-1

HD64F7051SFJ20V

Manufacturer Part Number
HD64F7051SFJ20V
Description
MCU 5V 256K J-TEMP PB-FREE QFP-1
Manufacturer
Renesas Electronics America
Series
SuperH® SH7050r
Datasheet

Specifications of HD64F7051SFJ20V

Core Processor
SH-2
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, WDT
Number Of I /o
102
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
168-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS
Quantity:
101
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
18.10
In the on-board programming modes (user mode and user program mode), NMI input should be
disabled to give top priority to the program/erase operations (including RAM emulation).
18.11
Programs and data can be written and erased in programmer mode as well as in the on-board
programming modes. In programmer mode, flash memory read mode, auto-program mode, auto-
erase mode, and status read mode are supported. In auto-program mode, auto-erase mode, and
status read mode, a status polling procedure is used, and in status read mode, detailed internal
signals are output after execution of an auto-program or auto-erase operation.
In programmer mode, set the mode pins to PLLx2 mode (see table 18.9) and input a 6 MHz input
clock, so that the SH7050 runs at 12 MHz.
Table 18.9 shows the pin settings for programmer mode. For the pin names in programmer mode,
see section 1.3.3, Pin Assignments.
Table 18.9 PROM Mode Pin Settings
Pin Names
Mode pins: MD3, MD2, MD1, MD0
FWE pin
RES pin
XTAL, EXTAL, PLLV
PLLV
SS
pins
Note on Flash Memory Programming/Erasing
Flash Memory Programmer Mode
CC
, PLLCAP,
Settings
1101 (PLL
High level input (in auto-program and auto-erase
modes)
Power-on reset circuit
Oscillator circuit
2)
Rev. 5.00 Jan 06, 2006 page 567 of 818
Section 18 ROM (128 kB Version)
REJ09B0273-0500

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