HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 327

MCU 5V 256K J-TEMP PB-FREE QFP-1

HD64F7051SFJ20V

Manufacturer Part Number
HD64F7051SFJ20V
Description
MCU 5V 256K J-TEMP PB-FREE QFP-1
Manufacturer
Renesas Electronics America
Series
SuperH® SH7050r
Datasheet

Specifications of HD64F7051SFJ20V

Core Processor
SH-2
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, WDT
Number Of I /o
102
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
168-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS
Quantity:
101
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
10.3.17 Timing of Buffer Register (BFR) Write and Transfer by Buffer Function
In channels 6 to 9, if the BFR value is transferred to the duty register (DTR) by a compare-match
with the cycle register (CYLR) in the T2 state during a write cycle from the CPU to the buffer
register (BFR), the value prior to the CPU write to BFR is transferred to DTR.
The timing in this case is shown in figure 10.29. In this example, a CYLR compare-match and a
write of H'AAAA to BFR occur simultaneously when the BFR value is H'5555.
Figure 10.29 Contention between Buffer Register (BFR) Write and Transfer by Buffer
Compare-match signal
Internal write signal
Address
DTR
BFR
CK
H'5555
Function
BFR write cycle
T1
BFR address
Rev. 5.00 Jan 06, 2006 page 305 of 818
Section 10 Advanced Timer Unit (ATU)
H'AAAA
written
to BFR
T2
H'AAAA
H'5555
REJ09B0273-0500

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