HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 476

MCU 5V 256K J-TEMP PB-FREE QFP-1

HD64F7051SFJ20V

Manufacturer Part Number
HD64F7051SFJ20V
Description
MCU 5V 256K J-TEMP PB-FREE QFP-1
Manufacturer
Renesas Electronics America
Series
SuperH® SH7050r
Datasheet

Specifications of HD64F7051SFJ20V

Core Processor
SH-2
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, WDT
Number Of I /o
102
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
168-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS
Quantity:
101
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Section 14 A/D Converter
14.4.4
External Triggering of A/D Conversion
A/D conversion can be externally triggered. To activate the A/D converter with an external trigger,
first set the pin functions with the PFC (pin function controller), then set the TRGE bit to 1 in the
A/D control register (ADCR). For the A/D0 converter module, also set the EXTRG bit in the A/D
trigger register (ADTRGR). When a low-level pulse is input to the ADTRG pin after these settings
have been made, the A/D converter detects the falling edge of the pulse and sets the ADST bit to
1. Figure 14.6 shows the timing for external trigger input.
The ADST bit is set to 1 one state after the A/D converter samples the falling edge on the ADTRG
pin. The timing from setting of the ADST bit until the start of A/D conversion is the same as when
1 is written into the ADST bit by software.
ADTRG pin sampled
ADTRG input
ADST bit
ADST = 1
Figure 14.6 External Trigger Input Timing
Rev. 5.00 Jan 06, 2006 page 454 of 818
REJ09B0273-0500

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