HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 33

• Manufacturer Part Number: HD64F7051SFJ20V
• Description: MCU 5V 256K J-TEMP PB-FREE QFP-1
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7050r

Specifications of HD64F7051SFJ20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, WDT
• Number Of I /o: 102
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 168-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Type
Interrupts
Address bus
Data bus
Bus control
Direct memory
access
controller
(DMAC)
Symbol
IRQOUT
A0–A21
D0–D15
CS0–CS3
RD
WRH
WRL
WAIT
DREQ0–
DREQ1
DRAK0–
DRAK1
DACK0–
DACK1
Pin No.
159
17–20, 22,
24–28, 30,
32–36, 38,
40–44
85–88, 90,
92–96, 98,
100–104
52–54, 133
50
46
45
48
131, 128
61, 62
129, 127
I/O
Output
Output
Input/
output
Output
Output
Output
Output
Input
Input
Output
Output
Name
Interrupt
request
output
Address bus
Data bus
Chip select
0 to 3
Read
Upper write
Lower write
Wait
DMA transfer
request
(channels 0, 1)
DREQ request
acknowledg-
ment (channels
0, 1)
DMA transfer
strobe
(channels 0, 1)
Rev. 5.00 Jan 06, 2006 page 11 of 818
Function
Indicates that an interrupt has
been generated.
Enables interrupt generation
to be recognized in the bus-
released state.
Address output pins.
16-bit bidirectional data bus
pins.
Chip select signals for
external memory or devices.
Indicates reading from an
external device.
Indicates writing of the upper
8 bits of external data.
Indicates writing of the lower
8 bits of external data.
Input for wait cycle insertion
in bus cycles during external
space access.
Input pin for external requests
for DMA transfer.
These pins output the input
sampling acknowledgment for
external requests for DMA
transfer.
These pins output a strobe to
the external I/O of external
DMA transfer requests.
Section 1 Overview
REJ09B0273-0500