HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 566

• Manufacturer Part Number: HD64F7051SFJ20V
• Description: MCU 5V 256K J-TEMP PB-FREE QFP-1
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7050r

Specifications of HD64F7051SFJ20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, WDT
• Number Of I /o: 102
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 168-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 18 ROM (128 kB Version)
18.5
18.5.1
FLMCR1 is an 8-bit register used for flash memory operating mode control. Program-verify mode
or erase-verify mode is entered by setting SWE to 1 when FWE = 1. Program mode is entered by
setting SWE to 1 when FWE = 1, then setting the PSU bit, and finally setting the P bit. Erase
mode is entered by setting SWE to 1 when FWE = 1, then setting the ESU bit, and finally setting
the E bit. FLMCR1 is initialized by a reset, and in hardware standby mode and software standby
mode. Its initial value is H'80 when a high level is input to the FWE pin, and H'00 when a low
level is input. When on-chip flash memory is disabled, a read will return H'00, and writes are
invalid.
Writes to bits SWE, ESU, PSU, EV, and PV in FLMCR1 are enabled only when FWE = 1 and
SWE = 1; writes to the E bit only when FWE = 1, SWE = 1, and ESU = 1; and writes to the P bit
only when FWE = 1, SWE = 1, and PSU = 1.
Bit 7—Flash Write Enable Bit (FWE): Sets hardware protection against flash memory
programming/erasing.
Bit 7:
FWE
0
1
Bit 6—Software Write Enable Bit (SWE): Enables or disables the flash memory. This bit should
be set before setting bits 5 to 0, and EBR1 bits 7 to 0.
Rev. 5.00 Jan 06, 2006 page 544 of 818
REJ09B0273-0500
Initial value:
Register Descriptions
Flash Memory Control Register 1 (FLMCR1)
Description
When a low level is input to the FWE pin (hardware-protected state)
When a high level is input to the FWE pin
R/W:
Bit:
FWE
1/0
R
7
SWE
R/W
6
0
ESU
R/W
5
0
PSU
R/W
4
0
R/W
EV
3
0
R/W
PV
2
0
R/W
E
1
0
(Initial value)
R/W
P
0
0