HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 346

MCU 5V 256K J-TEMP PB-FREE QFP-1

HD64F7051SFJ20V

Manufacturer Part Number
HD64F7051SFJ20V
Description
MCU 5V 256K J-TEMP PB-FREE QFP-1
Manufacturer
Renesas Electronics America
Series
SuperH® SH7050r
Datasheet

Specifications of HD64F7051SFJ20V

Core Processor
SH-2
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, WDT
Number Of I /o
102
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
168-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS
Quantity:
101
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Section 10 Advanced Timer Unit (ATU)
Sample Setup Procedure for Interval Timer Operation: An example of the setup procedure for
interval timer operation is shown in figure 10.50.
1. Set the first-stage counter clock ' in prescaler register 1 (PSCR1).
2. Set the ITVE0–ITVE3 bit to be used in the interval interrupt request register (ITVRR) to 1. An
3. Set bit 0 to 1 in the timer start register (TSTR) to start TCNT0.
Note: TCNT0 bit 10 corresponds to ITVE0 and ITVAD0, bit 11 to ITVE1 and ITVAD1, bit 12
Rev. 5.00 Jan 06, 2006 page 324 of 818
REJ09B0273-0500
interrupt request can be sent to the CPU when the corresponding bit changes to 1 in the
channel 0 free-running counter (TCNT0).
To start A/D converter sampling, set the ITVAD0–ITVAD3 bit to be used in ITVRR to 1.
to ITVE2 and ITVAD2, and bit 13 to ITVE3 and ITVAD3.
Figure 10.50 Sample Setup Procedure for Interval Timer Operation
or start of A/D0 sampling
Interrupt request to CPU
Select counter clock
Start counter
Set interval
Start
1
2
3

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