HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 173

• Manufacturer Part Number: HD64F7051SFJ20V
• Description: MCU 5V 256K J-TEMP PB-FREE QFP-1
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7050r

Specifications of HD64F7051SFJ20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, WDT
• Number Of I /o: 102
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 168-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Figure 9.2 is a flowchart of this procedure.
DMATCR – 1
(SAR, DAR, TCR, CHCR, DMAOR)
DEI interrupt request (when IE = 1)
Notes: 1.
NMIF, AE, TE = 0?
Transfer (1 transfer unit);
NMIF = 1, AE = 1,
DE, DME = 1 and
Transfer request
DE = 0, or DME
DMATCR = 0?
Initial settings
Transfer ends
Yes
Yes
Yes
occurs? *
Yes
2.
3.
Start
Does
= 0?
DMATCR, SAR and DAR
updated
In auto-request mode, transfer begins when NMIF, AE, and TE are all 0,
and the DE and DME bits are set to 1.
DREQ = level detection in burst mode (external request) or cycle-steal
mode.
DREQ = edge detection in burst mode (external request), or auto-request
mode in burst mode.
1
Figure 9.2 DMAC Transfer Flowchart
No
No
No
No
Section 9 Direct Memory Access Controller (DMAC)
NMIF = 1, AE = 1,
Transfer aborted
DE = 0, or DME
Normal end
Yes
*
Does
= 0?
3
Rev. 5.00 Jan 06, 2006 page 151 of 818
DREQ detection selection
transfer request mode,
Bus mode,
system
No
*
2
REJ09B0273-0500