AD6652BC/PCB Analog Devices Inc, AD6652BC/PCB Datasheet - Page 26

• Manufacturer Part Number: AD6652BC/PCB
• Description: BOARD EVAL W/AD6652 & SOFTWARE
• Manufacturer: Analog Devices Inc

Specifications of AD6652BC/PCB

• Module/board Type: Evaluation Board
• For Use With/related Products: AD6652
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

AD6652
Internal Reference Connection
A comparator within the AD6
SENSE pin and configures t
states, which are summarized in Table 11. If SENSE is grounde
the reference amplifier switch is connected to the internal
resistor divider (see Figure 40), setting VREF to a FIXED 1 V
reference output. Connecting the SENSE pin directly to V
switches the reference amplifier output to the SENSE pin,
completing the loop and providing a fixed 0.5 V reference
output. If a resistor divider is connected, as shown in Figure 41,
the switch is again set to the SENSE pin. This puts the reference
amplifier in a noninverting mode with the VREF programmab
output defined as follows:
Table 11. Reference SENSE Operation
Selected Mode
External Reference
Internal Fixed Reference
Programmable Reference
Internal Fixed Reference
0.1µF
VREF = 0.5 × (1 + R2/R1)
10µF
VINA+
VINA–
SENSE
VREF
Figure 40. Fixed Internal Reference Configuration
R
R
INT
INT
TO CH B
REF AMP
SELECT
LOGIC
REF
AMP A
he reference into four possible
652 detects the potential at the
VREF
SENSE Voltage
AVDD
VREF
0.2 V to VREF
AGND to 0.2 V
CH A
ADC
CORE
0.5V
REFT_A
REFB_A
0.1µF
0.1µF
0.1µF
Resu
External Reference
0.5
0.5 × (1 + R2/R1)
1.0
REF
Rev. 0 | Page 26 of 76
10µF
lting VREF
d,
le
(V)
In all referen
conversion core and establish its in
the ADC always equals twice the v
either an internal or an external reference.
The reference amplifier switch is located near the bottom left.
The SENSE pin is shown connected to ground, which sets VREF
to 1 V. Decoupling capacitors must be duplicated for the
Channel B ADC core, if it is used. The Channel B ref amp an
ADC core are identical to those of Channel A, but a
shown.
0.1 F
µ
WHERE R1 + R2 =
10kΩ TO 20kΩ
10µF
Figure 41. Programmable Reference Configuration
ce configurations, REFT and REFB drive the A/D
R2
R1
VINA+
VINA–
SENSE
Resulting Differential Span (V p-p)
2 × External Reference
1.0
2 × VREF (See Figure 42)
2.0
VREF
R
R
INT
INT
TO CH B
REF AMP
SELECT
LOGIC
REF
AMP A
VREF
oltage at the reference pin for
put span. The input range of
CH A
ADC
CORE
0.5V
REFT_A
REFB_A
re not
0.1µF
0.1µF
0.1µF
d
10µ
F