AD6652BC/PCB Analog Devices Inc, AD6652BC/PCB Datasheet - Page 9

• Manufacturer Part Number: AD6652BC/PCB
• Description: BOARD EVAL W/AD6652 & SOFTWARE
• Manufacturer: Analog Devices Inc

Specifications of AD6652BC/PCB

• Module/board Type: Evaluation Board
• For Use With/related Products: AD6652
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

MICROPROCESSOR PORT TIMING CHARACTERISTICS
All timing specifications valid over VDD range of 2.25 V to 2.75 V and VDDIO range of 3.0 V to 3.6 V.
CLOAD = 40 pF on all outputs, unless otherwise specified.
Table 7.
MICROPROCESSOR PORT, MODE INM (MODE = 0)
MODE INM WRITE TIMING
MODE INM READ TIMING
MICROPROCESSOR PORT, MODE MNM (MODE = 1)
MODE MNM WRITE TIMING
MODE MNM READ TIMING
1
Specification pertains to control signals: R/W, ( WR ), DS , ( RD ), and CS .
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
SC
HC
HWR
SAM
HAM
DRDY
ACC
SC
HC
SAM
HAM
DRDY
ACC
SC
HC
HDS
HRW
SAM
HAM
DDTACK
ACC
SC
HC
HDS
SAM
HAM
DDTACK
ACC
Control
Control
WR(R/W) to RDY(DTACK) Hold Time
Address/Data to WR(R/W) Setup Time
Address/Data to RDY(DTACK) Hold Time
WR(R/W) to RDY(DTACK) Delay
WR(R/W) to RDY(DTACK) High Delay
Control
Control
Address to RD(DS) Setup Time
Address to Data Hold Time
RD(DS) to RDY(DTACK) Delay
RD(DS) to RDY(DTACK) High Delay
Control
Control
DS(RD) to DTACK(RDY) Hold Time
R/W(WR) to DTACK(RDY) Hold Time
Address/Data To R/W(WR) Setup Time
Address/Data to R/W(WR) Hold Time
DS(RD) to DTACK(RDY) Delay
R/W(WR) to DTACK(RDY) Low Delay
Control
Control
DS(RD) to DTACK(RDY) Hold Time
Address to DS(RD) Setup Time
Address to Data Hold Time
DS(RD) to DTACK(RDY) Delay
DS(RD) to DTACK(RDY) Low Delay
1
1
1
1
1
1
1
1
to ↑CLK Setup Time
to ↑CLK Hold Time
to ↑CLK Setup Time
to ↑CLK Hold Time
to ↑CLK Setup Time
to ↑CLK Hold Time
to ↑CLK Setup Time
to ↑CLK Hold Time
Rev. 0 | Page 9 of 76
Temp
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Temp
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Test Level
IV
IV
IV
IV
IV
IV
IV
IV
IV
IV
IV
IV
IV
Test Level
IV
IV
IV
IV
IV
IV
IV
IV
IV
IV
IV
IV
IV
IV
IV
Min
2.0
2.5
7.0
3.0
5.0
8.0
4 × t
5.0
2.0
0.0
5.0
8.0
8 × t
Min
2.0
2.5
8.0
7.0
3.0
5.0
8.0
4 × t
5.0
2.0
8.0
0.0
5.0
8.0
8 × t
CLK
CLK
CLK
CLK
Typ
5 × t
10 × t
Typ
5 × t
10 × t
CLK
CLK
CLK
CLK
Max
9 × t
13 × t
Max
9 × t
13 × t
CLK
CLK
CLK
CLK
AD6652
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns