AD6652BC/PCB Analog Devices Inc, AD6652BC/PCB Datasheet - Page 27

• Manufacturer Part Number: AD6652BC/PCB
• Description: BOARD EVAL W/AD6652 & SOFTWARE
• Manufacturer: Analog Devices Inc

Specifications of AD6652BC/PCB

• Module/board Type: Evaluation Board
• For Use With/related Products: AD6652
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

External Reference Operation
An external reference voltage can be used to enhance the gain
accuracy of the ADC or improve thermal drift characteristics.
When multiple ADCs track one another, a single reference
(internal or external) might be necessary to reduce gain-
matching errors to an acceptable level. A high-precision
external reference can also be selected to provide lower gain and
offset temperature drift.
When the SENSE pin is tied to AVDD as in Figure 42, the
internal reference is disabled, allowing the use of an external
reference. An internal reference buffer loads the external
reference with an equivalent 7 kΩ load. The internal buffer still
generates the positive and negative full-scale references, REFT
and REFB, for the ADC core. The input span is always twice the
value of the reference voltage; therefore, the external reference
must be limited to a maximum of 1 V.
If the internal reference of the AD6652
IC
c
is affected by loading.
0.5V TO 1.0V
EXTERNAL
REFERENCE IN
0.1µF
onsidered. Figure 44 shows how the internal reference voltage
s, the loading on VREF by the other converters must be
Figure 42. External Reference Operation with Connections
10µF
SENSE
+3.0V
VINA+
VINA–
VREF
R
R
INT
INT
Shown for Channel A Only
TO CH B
REF AMP
SELECT
LOGIC
REF
AMP A
VREF
is used to drive multiple
CH A
ADC
CORE
0.5V
REFT_A
REFB_A
0.1µF
0.1µF
0.1µF
Rev. 0 | Page 27 of 76
10µF
Shared Reference Mode
The shared reference mode allows the user to connect the
references from the dual ADCs together for superior gain and
offset matching performance. If the ADCs are to function
independently, the reference decoupling should be treated
independently and can provide superior isolation between the
dual ADC channels. To enable shared reference mode, the
SHRDREF pin must be tied high and the differential references
must be externally shorted together, that is, REFTA must be
shorted externally to REFTB and REFBA must be shorted
externally to REFBB.
–0.05
–0.10
–0.15
–0.20
–0.25
0.05
1.2
1.0
0.8
0.6
0.4
0.2
0
0
–40 –30 –20 –10
0
0.5
Figure 44. VREF Accuracy vs. Load
Figure 43. Typical VREF Drift
0
1.0
TEMPERATURE (°C)
10
1V ERROR
LOAD (mA)
20
1.5
30
40
0.5V ERROR
2.0
50
V
REF
V
REF
60
= 0.5V
2.5
= 1V
70
80
AD6652
3.0
90