AD6652BC/PCB Analog Devices Inc, AD6652BC/PCB Datasheet - Page 54

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AD6652BC/PCB

Manufacturer Part Number
AD6652BC/PCB
Description
BOARD EVAL W/AD6652 & SOFTWARE
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD6652BC/PCB

Module/board Type
Evaluation Board
For Use With/related Products
AD6652
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
AD6652
The length of the wait before data transm
programmable value in
0x1D Bits 6–3). This value allows the AD6652 PCLK
TigerSHARC PCLK to be run at different rates and
phase.
WAIT ensures that the amount of time the AD6652 needs to
wait to begin data transmission is at least equal to the minimum
amount of time the TigerSHARC is expecting it to wait. If the
PCLK of the AD6652 is out of phase with the PCLK of the
TigerSHARC and the argument to the ceil() function is an
integer, then WAIT must be strictly greater than the value given
in the above formula.
If the LCLKs are in phase, then the maximum output data rate
is
Otherwise, it is
WAIT
f
f
LCLK
LCLK
_
_
AD
AD
ciel
6652
6652
6
×
15
14
6
6
the link port control registers (0x1B and
f
f
LCLK
LCLK
×
×
f
f
LCLK
LCLK
_
_
TSHARC
AD
6652
_
_
TSHARC
TSHARC
ission is a 4-bit
out of
and the
Rev. 0 | Page 54 of 76
TIGERSHARC CONFIGURATION
Because the AD6652 is always the transmitter in this link and
the TigerSHARC is always the receiver, the following values can
be programmed into the LCTL register for the link port used t
receive AD6652 output data.
Table 21. TigerSHARC LCTLx Register Configuration
Register
VERE
SPD
LTEN
PSIZE
TTOE
CERE
LREN
RTOE
1
The term User means that the actual register value depends on the user’s
application.
Value
0
User
0
1
0
0
1
1
1
o

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