FPGA - Field Programmable Gate Array 125K System Gates ProASIC3 nano

A3PN125-ZVQG100

Manufacturer Part NumberA3PN125-ZVQG100
DescriptionFPGA - Field Programmable Gate Array 125K System Gates ProASIC3 nano
ManufacturerActel
A3PN125-ZVQG100 datasheet
 

Specifications of A3PN125-ZVQG100

Processor SeriesA3PN125CoreIP Core
Number Of Macrocells1024Maximum Operating Frequency350 MHz
Number Of Programmable I/os71Data Ram Size36 Kbit
Delay Time1.02 nsSupply Voltage (max)3.3 V
Supply Current2 mAMaximum Operating Temperature+ 70 C
Minimum Operating Temperature- 20 CDevelopment Tools By SupplierAGLN-Nano-Kit, AGLN-Z-Nano-Kit, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FloasPro 4, FlashPro 3, FlashPro Lite
Mounting StyleSMD/SMTSupply Voltage (min)1.5 V
Number Of Gates125 KPackage / CaseVQFP-100
Lead Free Status / RoHS StatusLead free / RoHS Compliant  
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ProASIC3 nano Device Overview
ISP AES
User Nonvolatile
Decryption
Figure 1-3 • ProASIC3 nano Device Architecture Overview with Two I/O Banks (A3PN060 and A3PN125)
ISP AES
User Nonvolatile
Decryption
Figure 1-4 • ProASIC3 nano Device Architecture Overview with Four I/O Banks (A3PN250)
The FPGA core consists of a sea of VersaTiles. Each VersaTile can be configured as a three-input logic
function, a D-flip-flop (with or without enable), or a latch by programming the appropriate flash switch
interconnections. The versatility of the ProASIC3 nano core tile as either a three-input lookup table (LUT)
equivalent or as a D-flip-flop/latch with enable allows for efficient use of the FPGA fabric. The VersaTile
capability is unique to the Actel ProASIC3 family of third-generation architecture flash FPGAs. VersaTiles
are connected with any of the four levels of routing hierarchy. Flash switches are distributed throughout
the device to provide nonvolatile, reconfigurable interconnect programming. Maximum core utilization is
possible for virtually any design.
1 - 4
Bank 0
Charge Pumps
FlashROM
Bank 1
Bank 0
Charge Pumps
FlashROM
Bank 2
R e vi s i o n 8
CCC
RAM Block
4,608-Bit Dual-Port
SRAM or FIFO Block
I/Os
VersaTile
CCC
RAM Block
4,608-Bit Dual-Port
SRAM or FIFO Block
I/Os
VersaTile