MPC8533EVTARJA Freescale Semiconductor, MPC8533EVTARJA Datasheet - Page 361

• Manufacturer Part Number: MPC8533EVTARJA
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTARJA

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.067GHz
• Voltage: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Package / Case: 783-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

9.4.1.29
The memory error address capture register, shown in
a DDR ECC error is detected.
Freescale Semiconductor
11–15
16–17
18–19
20–30
8–10
Bits
5–7
31
Offset 0xE50
Reset
Name
TSRC Transaction source for the error
TTYP Transaction type for the error
TSIZ
VLD
W
—
—
—
R
0
Memory Error Address Capture (CAPTURE_ADDRESS)
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Figure 9-30. Memory Error Address Capture Register (CAPTURE_ADDRESS)
Transaction size for the error. Captures the transaction size in double words.
000 4 double words
001 1 double word
010 2 double words
011 3 double words
Others Reserved
Reserved
00000 PCI interface
00001 PCI Express interface 2
00010 PCI Express interface 1
00011 PCI Express interface 3
00100 Local Bus
00101–00111 Reserved
01000 Configuration space
01001 Reserved
01010 Boot sequencer
01011–01110 Reserved
01111 DDR controller
10000 Processor (instruction)
10001 Processor (data)
Reserved
00 Reserved
01 Write
10 Read
11 Read-modify-write
Reserved
Valid. Set as soon as valid information is captured in the error capture registers.
Table 9-34. CAPTURE_ATTRIBUTES Field Descriptions (continued)
All zeros
CADDR
Figure
Description
9-30, holds the 32 lsbs of a transaction when
10010 Reserved
10011 Reserved
10100 Reserved
10101 DMA
10110 Reserved
10111 SAP
11000 eTSEC 1
11001 Reserved
11010 eTSEC 3
11011 Reserved
11100 Reserved
11101 Reserved
11110 Reserved
11111
Reserved
Access: Read/Write
DDR Memory Controller
31
9-39