WM8900LGEFK/RV Wolfson Microelectronics, WM8900LGEFK/RV Datasheet - Page 61

• Manufacturer Part Number: WM8900LGEFK/RV
• Description: Audio CODECs Ultra Low Power Hi-Fi CODEC
• Manufacturer: Wolfson Microelectronics

Specifications of WM8900LGEFK/RV

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Production Data
HEADPHONE JACK DETECT
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The headphone jack detect feature may be used to automatically control any of the Line outputs
and Headphone outputs when a connection is made to a jack socket. Any of the ADCLRC/GPIO,
LINPUT3/JD, RINPUT3/JD, MODE/GPIO or CSB/GPIO pins may be selected as headphone jack
detect input to control the lineout enables. The most likely usage of this feature would be to disable
the Line outputs when a headphone is plugged into a jack socket.
The Jack Detect mode is enabled via the JD_ENA register bit. When enabled, the Jack Detect
input is selected via the JD_SRC field - this determines which pin of the WM8900 is used to
activate the Jack Detect feature. The JD_MODE bit may be used to reverse the polarity of the
selected Jack Detect input.
The selected Jack Detect input has two states - logic 0 and logic 1. For each of these two states,
the desired combination of Line output enables can be set by the user. The JD_EN0 register field
controls which outputs are enabled in the logic 0 Jack Detect state. The JD_EN1 field controls
which outputs are enabled in the logic 1 Jack Detect state.
The Line output and Headphone outputs controlled by the Jack Detect mode are controlled via an
AND function with their normal enable signals. Therefore, any output that is enabled via the
JD_EN0 or JD_EN1 fields will only be active if its normal enable signal (see Table 37) is also
enabled. Any output that is disabled via its normal enable signal will be unaffected by the Jack
Detect mode.
Any Line or Headphone output that is to be controlled by the Jack Detect mode must have its
normal enable signal active. Any Line or Headphone output that is to be unaffected by the Jack
Detect mode must set enabled in both the JD_EN0 and JD_EN1 fields.
The Jack Detect input must be de-bounced for correct operation. To do this, TOCLK_ENA must be
set and TOCLK_RATE set according to the desired fast/slow response time.
The de-bounced headphone Jack Detect signal may be output to the GPIO pin (see “General
Purpose Input/Output”). This is not possible if the pin is used for any other GPIO function.
Note that, when LINPUT3/JD or RINPUT3/JD is used as the Jack Detect input, the logic levels are
CMOS levels (0.3 AVDD / 0.7 AVDD).
R18 (12h)
GPIO Control
R17 (11h)
Jack Detect
Control
REGISTER
ADDRESS
9
8
3:1
13:8
BIT
JD_ENA
JD_MODE
JD_SRC[2:0]
JD_EN1[5:0]
LABEL
0
0
000
000000
DEFAULT
Jack Detect Switch Enable
0 = Jack Detect disabled
1 = Jack Detect enabled
Jack Detect Switch Polarity
0 = Jack Detect active high
1 = Jack Detect active low
Jack Detect Input Select
000 = ADCLRC/GPIO used for jack detect
001 = CSB/GPIO used for jack detect
010 = LINPUT3/JD used for jack detect
011 = RINPUT3/JD used for jack detect
100 = MODE/GPIO used for jack detect
101 to 111 Reserved
Output enables when selected jack
detection input is logic 1
JD_EN1[0] =1 enables LINEOUT_1L
JD_EN1[1] =1 enables LINEOUT_1R
JD_EN1[2] =1 enables LINEOUT_2R
JD_EN1[3] =1 enables LINEOUT_2R
JD_EN1[4] =1 enables Headphone
JD_EN1[5] =1 enables Charge Pump
PD, August 2008, Rev 4.0
DESCRIPTION
WM8900
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