WJLXT384LE.B1-868635 Cortina Systems Inc, WJLXT384LE.B1-868635 Datasheet - Page 27

• Manufacturer Part Number: WJLXT384LE.B1-868635
• Manufacturer: Cortina Systems Inc

Specifications of WJLXT384LE.B1-868635

• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Compliant

LXT384 Transceiver
Datasheet
248994, Revision 6.0
30 January 2008
5.3.3
Table 7
Cortina Systems
Framer/Mapper Signals - Details
For multi-function pins, the pin name in
Framer/Mapper Receive Signals (Sheet 1 of 2)
®
RDATA7
RDATA6
RDATA5
RDATA4
RDATA3
RDATA2
RDATA1
RDATA0
•
•
LXT384 Octal T1/E1/J1 Short-Haul PCM Transceiver with Jitter Attenuation (JA)
BPV7
BPV6
BPV5
BPV4
BPV3
BPV2
BPV1
BPV0
Table 7
Table 8
RCLK7
RCLK6
RCLK5
RCLK4
RCLK3
RCLK2
RCLK1
RCLK0
Signal
Name
/ RNEG7
/ RNEG6
/ RNEG5
/ RNEG4
/ RNEG3
/ RNEG2
/ RNEG1
/ RNEG0
/ RPOS7
/ RPOS6
/ RPOS5
/ RPOS4
/ RPOS3
/ RPOS2
/ RPOS1
/ RPOS0
lists and describes the LXT384 Transceiver framer/mapper receive signals.
lists and describes the LXT384 Transceiver framer/mapper transmit signals.
QFP
141
105
143
103
Pin
112
110
142
104
111
69
76
34
41
71
78
32
39
70
77
33
40
4
6
5
PBGA
M12
M14
M13
Ball
C12
A12
P12
C14
A14
P14
C13
A13
P13
M3
M1
M2
A3
C3
P3
A1
C1
P1
A2
C2
P2
Signal
Type
DO
DO
DO
blue bold
Bipolar Violation Detect Output 7:0.
When unipolar I/O is selected for the LXT384 Transceiver,
BPV acts as an output line code violation detector. If the
LXT384 Transceiver:
For details on Line Code Violations, see
Loss and Line-Code-Violation
For other pin functions, see RNEG.
Receive Clock Output 7:0.
Normally, this pin provides the recovered clock from the
signal received at RTIP and RRING. Under LOS conditions,
MCLK replaces RCLK at the RCLK output. For details, see
Section 6.3.3, Receiver Loss-Of-Signal
When MCLK is Low:
When MCLK is High:
For details about the relationship between MCLK and
RCLK, see
especially
Receive Data Output 7:0.
When unipolar I/O is selected for the LXT384 Transceiver,
RDATA acts as the receive data output.
See
Side.
For other pin functions, see RPOS.
• Does not detect an in-service line code violation, BPV
• Detects an in-service line code violation, it asserts BPV
• The LXT384 Transceiver enters the data recovery
• RCLK will be in high impedance state.
• The clock recovery circuit is disabled.
• The RCLK output is then the EX-OR of RPOS and
remains low.
high.
mode.
RNEG. This produces a pseudo-recovered clock.
Section 5.3.1, Bipolar vs. Unipolar Operation - Receive
Table
print indicates the signal being discussed.
Section 5.5, Clocks and Clock-Related
10.
TM
TM
Signal Description
Signals.
5.3 Framer/Mapper Signals
Detector.
Section 5.7, Signal
Signals,
Page 27