WJLXT384LE.B1-868635 Cortina Systems Inc, WJLXT384LE.B1-868635 Datasheet - Page 48

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WJLXT384LE.B1-868635

Manufacturer Part Number
WJLXT384LE.B1-868635
Description
Manufacturer
Cortina Systems Inc
Datasheet

Specifications of WJLXT384LE.B1-868635

Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
WJLXT384LE.B1-868635
Manufacturer:
INTEL
Quantity:
20 000
LXT384 Transceiver
Datasheet
248994, Revision 6.0
30 January 2008
6.3.3.2
6.3.4
6.3.5
6.3.5.1
6.3.5.2
Cortina Systems
ANSI T1.231 - Loss of Signal Detection
The T1.231 LOS detection criteria is employed. LOS is detected if the signal is below
200 mV for 175 contiguous pulse positions. The LOS condition is terminated upon detecting
an average pulse density of 12.5% over a period of 175 contiguous pulse positions starting
with the receipt of a pulse. The incoming signal is considered to have transitions when the
signal level is equal or greater than 250 mV.
Receiver Data Recovery Mode
In data-recovery mode, the combined analog/digital LOS detector circuit uses only its LOS
analog part, which complies with the ITU-G.775 recommendation. The LOS digital timing is
derived from an internal self-timed circuit. RPOS/RNEG stay active during the loss of signal.
The LXT384 Transceiver monitors the incoming signal amplitude. Typically, any signal
below 200 mV for more than 30 μs asserts the corresponding LOS pin. The LOS condition
clears when the signal amplitude rises above 250 mV. To declare an LOS condition in
accordance to ITU G.775, the LXT384 Transceiver requires periods that are more than 10
bits and less than 255 bits.
Receiver Alarm Indication Signal (AIS) Detection
The receiver performs an Alarm Indication Signal (AIS) detection independently of any
loopback mode. This feature is available only in the Host Processor mode and only in the
clock-recovery mode.
Because there is no clock in the data-recovery mode, AIS detection does not work in that
mode. AIS requires MCLK to be active, because the AIS function depends on a clock to
count the number of ones in an interval.
E1 Mode
After power-on reset, the LACS register
detection mode or the ETSI 3000 233 detection mode, both of which can be used for AIS.
For both ITU G.775 and ETSI ETS 300 233, the AIS condition is:
T1 Mode
ANSI T1.231 detection is employed. The AIS condition is:
®
• Declared when in a 512-bit period, the receiver detects less than 3 zeroes in the data
• Cleared when in a 512-bit period, the receiver detects 3 or more zeroes in the data
• Declared when less than 9 zeros are detected in any string of 8192 bits. This
• Cleared when the received signal contains 9 or more zeros in any string of 8192 bits.
LXT384 Octal T1/E1/J1 Short-Haul PCM Transceiver with Jitter Attenuation (JA)
returns to Low when the incoming signal has transitions when the signal level is equal
or greater than 250 mV for more than 32 consecutive pulse intervals. This mode is
activated by setting the LACS register bit to one.
stream.
stream.
corresponds to a 99.9% ones density over a period of 5.3 ms.
(Table
40) can be set to select either the ITU G.775
TM
TM
6.3 Receiver
Page 48

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