WJLXT384LE.B1-868635 Cortina Systems Inc, WJLXT384LE.B1-868635 Datasheet - Page 88

• Manufacturer Part Number: WJLXT384LE.B1-868635
• Manufacturer: Cortina Systems Inc

Specifications of WJLXT384LE.B1-868635

• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Compliant

LXT384 Transceiver
Datasheet
248994, Revision 6.0
30 January 2008
Table 53
Table 54
Figure 18
Cortina Systems
TMS
TDO
TCK
TDI
Instruction Register (IR)
JTAG Timing Characteristics
JTAG Timing
®
Cycle time
J-TMS/J-TDI to J-TCK rising edge time
J-CLK rising to J-TMS/L-TDI hold time
J-TCLK falling to J-TDO valid
SAMPLE / PRELOAD
INTEST_ANALOG
LXT384 Octal T1/E1/J1 Short-Haul PCM Transceiver with Jitter Attenuation (JA)
Instruction
EXTEST
IDCODE
BYPASS
Parameter
Code #
000
010
100
110
111
tSUR
Connects the BSR to TDI and TDO. Input pins values are loaded into the
BSR. Output pins values are loaded from the BSR.
Connects the ASR to TDI and TDO. Allows voltage forcing/sensing through
AT1 and AT2. Refer to
Connects the BSR to TDI and TDO. The normal path between the
LXT384 Transceiver logic and the I/O pins is maintained. The BSR is
loaded with the signals in the I/O pins.
Connects the IDR to the TDO pin.
Serial data from the TDI input is passed to the TDO output through the 1 bit
Bypass Register.
tHT
Tdod
Sym
Tcyc
Tsut
Tht
tCYC
Min.
200
50
50
-
tDOD
Table
Typ
-
-
-
-
51.
TM
TM
Comments
Max
50
-
-
-
Unit
ns
ns
ns
ns
9.4 JTAG Register Description
Test Conditions
Page 88