WJLXT384LE.B1-868635 Cortina Systems Inc, WJLXT384LE.B1-868635 Datasheet - Page 33

• Manufacturer Part Number: WJLXT384LE.B1-868635
• Manufacturer: Cortina Systems Inc

Specifications of WJLXT384LE.B1-868635

• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Compliant

LXT384 Transceiver
Datasheet
248994, Revision 6.0
30 January 2008
Table 9
Cortina Systems
Line Interface Unit Signals (Sheet 1 of 2)
®
D7 /
D6 /
D5 /
D4 /
D3 /
D2 /
D1 /
D0 /
LXT384 Octal T1/E1/J1 Short-Haul PCM Transceiver with Jitter Attenuation (JA)
Signal
Name
OE
LOOP7
LOOP6
LOOP5
LOOP4
LOOP3
LOOP2
LOOP1
LOOP0
QFP
Pin
114
28
27
26
25
24
23
22
21
PBGA
Ball
E14
H2
H3
G2
K1
J1
J2
J3
J4
Signal
Type
DI/O
DI
Loopback Mode Input/Output.
When the LXT384 Transceiver is in the Hardware mode and a
LOOPx pin is:
When the LXT384 Transceiver is in the Host Processor mode with
a:
For other pin functions, see D7:0 in
Standard Bus and Interface
Output Driver Enable Input.
Either the (hardware) OE pin or the OER register can be used to
place the transmitter TRING and TTIP outputs immediately into a
high-impedance mode. This supports redundancy applications
without external mechanical relays.
When the LXT384 Transceiver is in the:
Note:
• Low, the LXT384 Transceiver enters Remote loopback.
• High, the LXT384 Transceiver enters Analog loopback.
• Left unconnected, LOOPx stays in a high-impedance tristate.
• Parallel interface, see the signal descriptions for D7:0 in
• Serial interface, LOOP7:0 must be grounded.
• Hardware mode and OE is connected:
• Host Processor mode, instead of the OE pin, you can write a
• This mode ignores data on TPOS and TNEG, although a
• Data received on RTIP and RRING is looped around and
• In data recovery mode, the pulse template cannot be
• This mode ignores data received on RTIP and RRING.
• Data transmitted on TTIP and TRING is internally looped
• Loopback is no longer selected.
• If the LXT384 Transceiver is used in Hardware mode, to
Section 5.2, Microprocessor-Standard Bus and Interface
Signals.
• Low, OE is used to disable all transmit output drivers at one
• High, OE is used to enable transmitter output drivers.
1 to the OE bit of the OER register to place individual TRING
and TTIP outputs into high-impedance. (See
Section 8.0,
TCLK input is still required. An option is to connect RCLK to
TCLK externally, outside the transceiver.
retransmitted on TTIP and TRING.
guaranteed while in a remote loopback. (For details, see
Section 6.7.3, Remote
around and routed back to the receive inputs. (For details,
see
minimize cross-talk, the layout design must not route
signals with fast transitions near the LOOP7:0 pins. Also
maintain a solid ground plane under these pins.
time, and to place TRING and TTIP outputs into high-
impedance. All other internal circuitry stays active.
In Host Processor mode, the OE pin when set low
overrides the OER register setting.
Section 6.7.1, Analog
Registers.)
TM
TM
Signal Description
Signals.
Loopback.)
Loopback.)
5.4 Line Interface Unit Signals
Section 5.2, Microprocessor-
Table 5
in
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