WJLXT384LE.B1-868635 Cortina Systems Inc, WJLXT384LE.B1-868635 Datasheet - Page 9

• Manufacturer Part Number: WJLXT384LE.B1-868635
• Manufacturer: Cortina Systems Inc

Specifications of WJLXT384LE.B1-868635

• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Compliant

LXT384 Transceiver
Datasheet
248994, Revision 6.0
30 January 2008
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Cortina Systems
LXT384 Transceiver High-Level Block Diagram............................................................................ 13
LXT384 Transceiver Detailed Block Diagram................................................................................ 14
LXT384 Transceiver 144-Pin Assignments ................................................................................... 16
LXT384 Transceiver Plastic Ball Grid Array (PBGA) Pin Assignments ......................................... 17
50% AMI Encoding ........................................................................................................................ 51
LXT384 Transceiver External Transmit/Receive Line Circuitry ..................................................... 55
Jitter Attenuator ............................................................................................................................. 57
LXT384 Transceiver Analog Loopback ......................................................................................... 59
LXT384 Transceiver Digital Loopback........................................................................................... 59
LXT384 Transceiver Remote Loopback ........................................................................................ 60
TAOS Data Path for LXT384 Transceiver ..................................................................................... 61
TAOS with Analog Loopback for LXT384 Transceiver .................................................................. 61
TAOS with Digital Loopback for LXT384 Transceiver ................................................................... 62
Host Processor Mode - Serial Interface Read Timing ................................................................... 67
JTAG Architecture ......................................................................................................................... 80
JTAG State Diagram ..................................................................................................................... 82
Analog Test Port Application ......................................................................................................... 86
JTAG Timing.................................................................................................................................. 88
LXT384 Transceiver - Transmit Timing ......................................................................................... 97
LXT384 Transceiver - Receive Timing .......................................................................................... 98
Intel* Processor Non-Multiplexed Interface - Read Timing.......................................................... 100
Intel* Processor Multiplexed Interface - Read Timing ................................................................. 101
Intel* Processor Non-Multiplexed Interface - Write Timing.......................................................... 103
Intel* Processor Multiplexed Interface - Write Timing.................................................................. 104
Motorola* Processor Non-Multiplexed Interface - Read Timing .................................................. 106
Motorola Processor Multiplexed Interface - Read Timing............................................................ 107
Motorola* Processor Non-Multiplexed Interface - Write Timing................................................... 109
Motorola* Processor Multiplexed Interface - Write Timing .......................................................... 110
Serial Input Timing....................................................................................................................... 111
Serial Output Timing.................................................................................................................... 112
E1, ITU G.703 Mask Template .................................................................................................... 115
T1, T1.102 Mask Templates for LXT384 ..................................................................................... 116
LXT384 Transceiver Jitter Tolerance Performance..................................................................... 118
LXT384 Transceiver Jitter Transfer Performance ....................................................................... 119
LXT384 Transceiver Output Jitter for ETSI CTR12/13 Applications............................................ 120
Dimensions for 144-Pin Low Octal Flat Package (LQFP) ........................................................... 122
Dimensions for 160-Ball Plastic Ball Grid Array (BGA) ............................................................... 123
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LXT384 Octal T1/E1/J1 Short-Haul PCM Transceiver with Jitter Attenuation (JA)
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