WJLXT384LE.B1-868635 Cortina Systems Inc, WJLXT384LE.B1-868635 Datasheet - Page 62

• Manufacturer Part Number: WJLXT384LE.B1-868635
• Manufacturer: Cortina Systems Inc

Specifications of WJLXT384LE.B1-868635

• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Compliant

LXT384 Transceiver
Datasheet
248994, Revision 6.0
30 January 2008
6.8.3
Figure 13
6.9
Cortina Systems
TAOS Generation with Digital Loopback
Figure 13
TAOS with Digital Loopback for
Performance Monitoring
The LXT384 Transceiver can be set for either one of the following configurations:
The LXT384 Transceiver can be configured to monitor the performance of either (1) one of
the line-side receivers 1 through 7 or (2) one of the line-side transmitters 1 through 7. The
configuration can be performed using either the Hardware mode (see
Section 5.7, Signal Loss and Line-Code-Violation
Table 38
Performance Monitoring through Clock and Data Recovery. Performance monitoring of
either (1) analog inputs to channels 1 through 7 or (2) analog outputs from any one of
channels 1 through 7 can be accomplished through clock and data recovery as follows.
®
1. As shown in
2. The line signal from the channel selected can then be observed digitally at RCLK0/
• All eight channels 0 through 7 operating as regular transceivers
• Channels 1 through 7 operating as regular transceivers and the channel 0 transceiver
LXT384 Octal T1/E1/J1 Short-Haul PCM Transceiver with Jitter Attenuation (JA)
configured for non-intrusive performance monitoring of one of the other channels, per
ITU-T G.722
channel selected for monitoring is processed by the channel 0 transceiver clock and
data recovery.
RPOS0/ RNEG0. Channel 0 displays the appropriate LOS state for the line signal of the
channel selected, both in transmit and receive directions.
RNEG
TNEG
RPOS
MCLK
TPOS
RCLK
TCLK
in
shows how the TAOS mode affects the receive path after digital loopback.
Section 8.0,
* If Enabled
Figure 1
Registers).
in
Section 2.0, Product
JA*
JA*
TAOS Mode
LXT384 Transceiver
Signals) or the Host Processor mode (see
Summary, the analog input from the
Recovery
Timing &
Control
Timing
TM
TM
6.9 Performance Monitoring
Table 13
TTIP
TRING
(ALL 1's)
RTIP
RRING
in
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