WJLXT384LE.B1-868635 Cortina Systems Inc, WJLXT384LE.B1-868635 Datasheet - Page 40
WJLXT384LE.B1-868635
Manufacturer Part Number
WJLXT384LE.B1-868635
Description
Manufacturer
Cortina Systems Inc
Datasheet
1.WJLXT384LE.B1-868635.pdf
(125 pages)
Specifications of WJLXT384LE.B1-868635
Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Compliant
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Part Number:
WJLXT384LE.B1-868635
Manufacturer:
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LXT384 Transceiver
Datasheet
248994, Revision 6.0
30 January 2008
Table 12
Cortina Systems
Signal Loss and Line-Code-Violation Signals
Table 13
LXT384 Transceiver is in the Hardware mode.
®
1. DI: Digital Input. DO: Digital Output.
LXT384 Octal T1/E1/J1 Short-Haul PCM Transceiver with Jitter Attenuation (JA)
RCLK7:0
BPV7:0
Signal
Name
CLKE
LOS7
LOS6
LOS5
LOS4
LOS3
LOS2
LOS1
LOS0
A4
A3
A2
A1
A0
lists performance-monitoring selections that can be made when the
QFP
140
106
Pin
113
12
13
14
15
16
68
75
35
42
3
PBGA
Ball
E12
E11
K11
K12
G3
E4
E3
K3
K4
F4
F3
F2
F1
I/O
DO
DI
1
Performance Monitoring Input.
When the LXT384 Transceiver is in the:
Bipolar Violation Detect Output 7:0.
For information on the BPV signals, see
Mapper
Clock Edge Select Input.
For information on how CLKE is used for clock and data recovery,
see
Loss of Signal Output.
LOS is:
Note:
Receive Clock Output 7:0.
For information on how RCLK is used for clock and data recovery,
see
• Hardware mode, the A3:0 pins make the performance
• Host Processor mode:
• Low when a loss-of-signal condition is cleared (incoming signal
• High (indicating a loss of signal), when there is no incoming
monitoring selections shown in
to ground.
• These pins no longer control the monitoring function. Instead,
• For information on how to control performance monitoring,
Section 5.5, Clocks and Clock-Related
with normal levels, being processed through the transceiver).
signal (sequence of marks for a specified time interval).
Section 5.3, Framer/Mapper
in non-multiplexed host mode, these pins function as
nonmultiplexed address pins (see
Microprocessor-Standard Bus and Interface
see
Signals.
When a loss-of-signal condition is cleared, LOS returns to
low when an incoming signal has a sufficient number of
transitions in a specified time interval. (For details, see
Section 6.3.3, Receiver Loss-Of-Signal
Table
38.
TM
TM
Signal Description
5.7 Signal Loss and Line-Code-
Signals.
Table
Section 5.3, Framer/
Section 5.2,
13. A4 must be connected
Signals.
Detector.)
Violation Signals
Signals).
Page 40
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