WJLXT384LE.B1-868635 Cortina Systems Inc, WJLXT384LE.B1-868635 Datasheet - Page 76
WJLXT384LE.B1-868635
Manufacturer Part Number
WJLXT384LE.B1-868635
Description
Manufacturer
Cortina Systems Inc
Datasheet
1.WJLXT384LE.B1-868635.pdf
(125 pages)
Specifications of WJLXT384LE.B1-868635
Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Compliant
Available stocks
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Manufacturer
Quantity
Price
Part Number:
WJLXT384LE.B1-868635
Manufacturer:
INTEL
Quantity:
20 000
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LXT384 Transceiver
Datasheet
248994, Revision 6.0
30 January 2008
Table 39
Table 40
Table 41
Cortina Systems
Digital Loopback Register, DL - 0Ch
LOS/AIS Criteria Selection Register, LACS - 0Dh
Automatic TAOS Select Register, ATS - 0Eh
®
Bit
7:0
Bit
7:0
Bit
7:0
LXT384 Octal T1/E1/J1 Short-Haul PCM Transceiver with Jitter Attenuation (JA)
LACS7:0
ATS7:0
Name
Name
Name
DL7:0
Digital Loopback.
During digital loopback, LOS and TAOS stay active and independent of TCLK,
while data received on TPOS, TNEG, and CKLK loop back to RPOS, RNEG,
and RCLK.
Loss of Signal / Alarm Indication Signal Selection Criteria.
Automatic Transmit-All-Ones Select.
Note:
• On power-up, the DL7:0 bits are cleared to ‘0’, and all digital loopback
• Setting a DL bit to ‘1’ enables digital loopback for its corresponding
• At power-up, all LACS7:0 bits are cleared to ‘0’.
• After power-up, programming an LACS bit to:
• In T1 mode, this register is “Don’t Care.” The LXT384 Transceiver uses
• On power-on, all ATS7:0 bits are cleared to ‘0’.
• When this field is set to ‘1’, then when there is an LOS condition, TAOS can
channels are disabled.
transceiver.
• ‘0’ selects the ITU G.775 mode [for LOS, AIS, and remote detect
• ‘1’ selects the ETSI 300 233 LOS and AIS detection mode for the
T1.231 compliant LOS/AIS detection.
be generated automatically.
indication (RDI)] for its corresponding receiver.
corresponding receiver.
This register does not work during either data-recovery mode or line-
driver mode (that is, when both MCLK = High and TCLK = High).
Description
Description
Description
TM
TM
8.3 Register Descriptions
Page 76
R/W
R/W
R/W
R/W
R/W
R/W
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