PSD935G2-90U STMicroelectronics, PSD935G2-90U Datasheet - Page 16

• Manufacturer Part Number: PSD935G2-90U
• Manufacturer: STMicroelectronics

Specifications of PSD935G2-90U

• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Package Type: TQFP
• Mounting: Surface Mount
• Pin Count: 80
• Lead Free Status / RoHS Status: Compliant

PSD935G2
9.0
The
PSD935G2
Functional
Blocks
As shown in Figure 1, the PSD935G2 consists of six major types of functional blocks:
The functions of each block are described in the following sections. Many of the blocks
perform multiple functions, and are user configurable.
9.1 Memory Blocks
The PSD935G2 has the following memory blocks:
The memory select signals for these blocks originate from the Decode PLD (DPLD) and
are user-defined in PSDsoft.
Table 7 summarizes which versions of the PSD935G2 contain which memory blocks.
Table 7. Memory Blocks
9.1.1 Main Flash and Secondary Flash Memory Description
The main Flash memory block is divided evenly into eight sectors. The secondary Flash
memory is divided into four sectors of eight Kbytes each. Each sector of either memory
can be separately protected from program and erase operations.
Flash memory may be erased on a sector-by-sector basis and programmed word-by-word.
Flash sector erasure may be suspended while data is read from other sectors of memory
and then resumed after reading.
During a program or erase of Flash, the status can be output on the Rdy/Bsy pin of Port
PE4. This pin is set up using PSDsoft.
9.1.1.1 Memory Block Selects
The decode PLD in the PSD935G2 generates the chip selects for all the internal memory
blocks (refer to the PLD section). Each of the eight Flash memory sectors have a
Flash Select signal (FS0-FS7) which can contain up to three product terms. Each of the
four Secondary Flash memory sectors have a Select signal (CSBOOT0-3) which can
contain up to three product terms. Having three product terms for each sector select signal
allows a given sector to be mapped in different areas of system memory. When using a
microcontroller (80C51) with separate Program and Data space, these flexible select
signals allow dynamic re-mapping of sectors from one space to the other before and after
IAP.
PSD935G2
Memory Blocks
PLD Blocks
Bus Interface
I/O Ports
Power Management Unit
JTAG-ISP Interface
•
•
•
Device
The main Flash memory
Secondary Flash memory
SRAM.
Flash Size
512KB
Main Flash
Sector Size
64KB
Block Size
32KB
Secondary Flash
PSD9XX Family
Sector Size
8KB
SRAM
8KB
15