PSD935G2-90U STMicroelectronics, PSD935G2-90U Datasheet - Page 47

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PSD935G2-90U

Manufacturer Part Number
PSD935G2-90U
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of PSD935G2-90U

Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Package Type
TQFP
Mounting
Surface Mount
Pin Count
80
Lead Free Status / RoHS Status
Compliant

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The
PSD935G2
Functional
Blocks
(cont.)
46
PSD9XX Family
9.4 I/O Ports
There are seven programmable I/O ports: Ports A, B, C, D, E, F and G. Each of the ports
is eight bits except Port D, which is 4 bits. Each port pin is individually user configurable,
thus allowing multiple functions per port. The ports are configured using PSDsoft or by the
microcontroller writing to on-chip registers in the CSIOP address space.
The topics discussed in this section are:
9.4.1 General Port Architecture
The general architecture of the I/O Port is shown in Figure 20. Individual Port architectures
are shown in Figures 21 through 23. In general, once the purpose for a port pin has been
defined, that pin will no longer be available for other purposes. Exceptions will be noted.
As shown in Figure 20, the ports contain an output multiplexer whose selects are driven
by the configuration bits in the Control Registers (Ports E, F and G only) and PSDsoft
Configuration. Inputs to the multiplexer include the following:
The Port Data Buffer (PDB) is a tri-state buffer that allows only one source at a time to be
read. The PDB is connected to the Internal Data Bus for feedback and can be read by the
microcontroller. The Data Out and Micro Cell outputs, Direction and Control Registers,
and port pin input are all connected to the PDB.
The contents of these registers can be altered by the microcontroller. The PDB feedback
path allows the microcontroller to check the contents of the registers.
9.4.2 Port Operating Modes
The I/O Ports have several modes of operation. Some modes can be defined using
PSDsoft, some by the microcontroller writing to the Registers in CSIOP space, and some
by both. The modes that can only be defined using PSDsoft must be programmed into the
device and cannot be changed unless the device is reprogrammed. The modes that can be
changed by the microcontroller can be done so dynamically at run-time. The PLD I/O,
Data Port, Address Input, and MCU Reset modes are the only modes that must be defined
before programming the device. All other modes can be changed by the microcontroller at
run-time.
Table 16 summarizes which modes are available on each port. Table 19 shows how and
where the different modes are configured. Each of the port operating modes are described
in the following subsections.
Output data from the Data Out Register
Latched address outputs
GPLD outputs (External Chip Selects)
General Port Architecture
Port Operating Modes
Port Configuration Registers
Port Data Registers
Individual Port Functionality.
PSD935G2

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