PSD935G2-90U STMicroelectronics, PSD935G2-90U Datasheet - Page 71

• Manufacturer Part Number: PSD935G2-90U
• Manufacturer: STMicroelectronics

Specifications of PSD935G2-90U

• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Package Type: TQFP
• Mounting: Surface Mount
• Pin Count: 80
• Lead Free Status / RoHS Status: Compliant

Write Timing
PSD9XX Family
NOTES: 1.
PLD Combinatorial Timing
70
NOTE: 1. Fast Slew Rate output available on Port C and F.
Microcontroller Interface – PSD935G2 AC/DC Parameters
(5V ± 10% Versions)
Symbol
t
t
Symbol
PD
ARD
t
t
t
t
t
t
t
t
t
t
t
t
LVLX
AVLX
LXAX
AVWL
WHAX1
WHAX2
WHPV
AVPV
SLWL
DVWH
WHDX
WLWH
2.
3.
4.
PLD Input Pin/Feedback to
PLD Combinatorial Output
PLD Array Delay
Any input used to select an internal PSD935G2 function.
In multiplexed mode, latched addresses generated from ADIO delay to address output on any Port.
WR timing has the same timing as E, DS signals.
t
ALE or AS Pulse Width
Address Setup Time
Address Hold Time
Address Valid to Leading
Edge of WR
CS Valid to Leading Edge of WR
WR Data Setup Time
WR Data Hold Time
WR Pulse Width
Trailing Edge of WR to Address
Invalid
Trailing Edge of WR to DPLD
Address Input Invalid
Trailing Edge of WR to Port Output
Valid Using I/O Port Data Register
Address Input Valid to Address
Output Delay
WHAX2
(5 V ± 10% Versions)
is Address Hold Time for DPLD inputs that are used to generate chip selects for internal PSD memory.
Parameter
Parameter
(5 V ± 10%)
Conditions
(Notes 1 and 3)
(Note 3 and 4)
Min
Conditions
(Note 1)
(Note 1)
(Note 3)
(Note 3)
(Note 3)
(Note 3)
(Note 3)
(Note 3)
(Note 2)
-70
Max
20
11
Min
-90
Min
15
12
25
28
Max
4
7
8
4
6
0
25
16
-70
Max
PSD935G2
27
20
Add 12
TURBO
OFF
Min
20
15
35
35
15
6
8
5
8
0
-90
(Note 1)
Sub 2
Slew
Rate
Max
30
25
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns