ST7LIT10BF1 STMicroelectronics, ST7LIT10BF1 Datasheet - Page 23

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ST7LIT10BF1

Manufacturer Part Number
ST7LIT10BF1
Description
8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, 5 TIMERS, SPI
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7LIT10BF1

Up To 4 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention
20 years at 55˚C.
128 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55˚C.
Clock Sources
Internal 1% RC oscillator (on ST7FLITE15B and ST7FLITE19B), crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-Halt, Auto Wake-up from Halt, Wait and Slow
7 SUPPLY, RESET AND CLOCK MANAGEMENT
The device includes a range of utility features for
securing the application in critical situations (for
example in case of a power brown-out), and re-
ducing the number of external components.
Main features
7.1 INTERNAL RC OSCILLATOR ADJUSTMENT
The device contains an internal RC oscillator with
an accuracy of 1% for a given device, temperature
and voltage range (4.5V-5.5V). It must be calibrat-
ed to obtain the frequency required in the applica-
tion. This is done by software writing a 10-bit cali-
bration value in the RCCR (RC Control Register)
and in the bits 6:5 in the SICSR (SI Control Status
Register).
Whenever the microcontroller is reset, the RCCR
returns to its default value (FFh), i.e. each time the
device is reset, the calibration value must be load-
ed in the RCCR. Predefined calibration values are
stored in EEPROM for 3 and 5V V
ages at 25°C, as shown in the following table.
Clock Management
– 1 MHz internal RC oscillator (enabled by op-
– 1 to 16 MHz External crystal/ceramic resona-
– External Clock Input (enabled by option byte)
– PLL for multiplying the frequency by 8 or 4
– For clock ART counter only: PLL32 for multi-
Reset Sequence Manager (RSM)
System Integrity Management (SI)
– Main supply Low voltage detection (LVD) with
– Auxiliary Voltage detector (AVD) with interrupt
tion byte, available on ST7LITE15B and
ST7LITE19B devices only)
tor (selected by option byte)
(enabled by option byte)
plying the 8 MHz frequency by 4 (enabled by
option byte). The 8 MHz input frequency is
mandatory and can be obtained in the follow-
ing ways:
reset generation (enabled by option byte)
capability for monitoring the main supply (en-
abled by option byte)
–1 MHz RC + PLLx8
–16 MHz external clock (internally divided
–2 MHz. external clock (internally divided by
–Crystal oscillator with 16 MHz output fre-
by 2)
2) + PLLx8
quency (internally divided by 2)
DD
supply volt-
1. DEE0h, DEE1h, DEE2h and DEE3h addresses
are located in a reserved area of non-volatile
memory. They are read-only bytes for the applica-
tion code. This area cannot be erased or pro-
grammed by any ICC operation.
For compatibility reasons with the SICSR register,
CR[1:0] bits are stored in the 5th and 6th position
of DEE1 and DEE3 addresses.
Notes:
– In 38-pulse ICC mode, the internal RC oscillator
– See “ELECTRICAL CHARACTERISTICS” on
– To improve clock stability and frequency accura-
– These bytes are systematically programmed by
Caution: If the voltage or temperature conditions
change in the application, the frequency may need
to be recalibrated.
Refer to application note AN1324 for information
on how to calibrate the RC frequency using an ex-
ternal reference signal.
7.2 PHASE LOCKED LOOP
The PLL can be used to multiply a 1MHz frequen-
cy from the RC oscillator or the external clock by 4
or 8 to obtain f
bled and the multiplication factor of 4 or 8 is select-
ed by 2 option bits.
– The x4 PLL is intended for operation with V
RCCRH0 V
RCCRL0
RCCRH1 V
RCCRL1
is forced as a clock source, regardless of the se-
lection in the option byte. For ST7LITE10B devic-
es which do not support the internal RC
oscillator, the “option byte disabled” mode must
be used (35-pulse ICC mode entry, clock provid-
ed by the tool).
page 110. for more information on the frequency
and accuracy of the RC oscillator.
cy, it is recommended to place a decoupling ca-
pacitor, typically 100nF, between the V
V
ST, including on FASTROM devices.
the 2.7V to 3.3V range
RCCR
SS
pins as close as possible to the ST7 device.
T
f
T
f
RC
RC
A
A
DD
DD
Conditions
=25°C
=25°C
=1MHz
=1MHz
=5V
=3.3V
OSC
of 4 or 8 MHz. The PLL is ena-
DEE0h
DEE1h
DEE2h
DEE3h
ST7LITE1xB
1)
1)
1)
1)
Address
ST7LITE1xB
(CR[9:2])
(CR[1:0])
(CR[9:2])
(CR[1:0])
DD
and
23/159
DD
in
1

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