ST7LIT10BF1 STMicroelectronics, ST7LIT10BF1 Datasheet - Page 33

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ST7LIT10BF1

Manufacturer Part Number
ST7LIT10BF1
Description
8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, 5 TIMERS, SPI
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7LIT10BF1

Up To 4 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention
20 years at 55˚C.
128 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55˚C.
Clock Sources
Internal 1% RC oscillator (on ST7FLITE15B and ST7FLITE19B), crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-Halt, Auto Wake-up from Halt, Wait and Slow
SYSTEM INTEGRITY MANAGEMENT (Cont’d)
7.6.2 Auxiliary Voltage Detector (AVD)
The Voltage Detector function (AVD) is based on
an analog comparison between a V
V
ply voltage (V
for falling voltage is lower than the V
ence value for rising voltage in order to avoid par-
asitic detection (hysteresis).
The output of the AVD comparator is directly read-
able by the application software through a real
time status bit (AVDF) in the SICSR register. This
bit is read only.
Caution: The AVD functions only if the LVD is en-
Figure 20. Using the AVD to Monitor V
IT+(AVD)
AVDF bit
AVD INTERRUPT
REQUEST
IF AVDIE bit = 1
LVD RESET
V
V
V
V
IT+(AVD)
IT+(LVD)
IT-(LVD)
IT-(AVD)
reference value and the V
V
AVD
DD
). The V
0
IT-(AVD)
1
reference value
IT+(AVD)
DD
INTERRUPT Cleared by
IT-(AVD)
main sup-
V
Early Warning Interrupt
(Power has dropped, MCU not
not yet in reset)
DD
hyst
refer-
reset
and
RESET
abled through the option byte.
7.6.2.1 Monitoring the V
The AVD voltage threshold value is relative to the
selected LVD threshold configured by option byte
(see
If the AVD interrupt is enabled, an interrupt is gen-
erated when the voltage crosses the V
V
In the case of a drop in voltage, the AVD interrupt
acts as an early warning, allowing software to shut
down safely before the LVD resets the microcon-
troller. See
IT-(AVD)
section 15.1 on page
threshold (AVDF bit is set).
Figure
20.
1
INTERRUPT Cleared by
DD
149).
Main Supply
hardware
0
ST7LITE1xB
IT+(LVD)
33/159
or
1

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