ST7LIT10BF1 STMicroelectronics, ST7LIT10BF1 Datasheet - Page 41

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ST7LIT10BF1

Manufacturer Part Number
ST7LIT10BF1
Description
8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, 5 TIMERS, SPI
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7LIT10BF1

Up To 4 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention
20 years at 55˚C.
128 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55˚C.
Clock Sources
Internal 1% RC oscillator (on ST7FLITE15B and ST7FLITE19B), crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-Halt, Auto Wake-up from Halt, Wait and Slow
POWER SAVING MODES (Cont’d)
9.3 WAIT MODE
WAIT mode places the MCU in a low power con-
sumption mode by stopping the CPU.
This power saving mode is selected by calling the
‘WFI’ instruction.
All peripherals remain active. During WAIT mode,
the I bit of the CC register is cleared, to enable all
interrupts. All other registers and memory remain
unchanged. The MCU remains in WAIT mode until
an interrupt or RESET occurs, whereupon the Pro-
gram Counter branches to the starting address of
the interrupt or Reset service routine.
The MCU will remain in WAIT mode until a Reset
or an Interrupt occurs, causing it to wake up.
Refer to
Figure
24.
Figure 24. WAIT Mode Flow-chart
Note:
1. Before servicing an interrupt, the CC register is
pushed on the stack. The I bit of the CC register is
set during the interrupt routine and cleared when
the CC register is popped.
WFI INSTRUCTION
N
INTERRUPT
Y
OR SERVICE INTERRUPT
FETCH RESET VECTOR
256 OR 4096 CPU CLOCK
OSCILLATOR
PERIPHERALS
OSCILLATOR
PERIPHERALS
OSCILLATOR
PERIPHERALS
CPU
I BIT
CPU
I BIT
CPU
I BIT
N
CYCLE DELAY
RESET
Y
ST7LITE1xB
OFF
OFF
ON
ON
ON
ON
ON
ON
ON
X
0
0
1)
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