IRCC2.0 SMSC Corporation, IRCC2.0 Datasheet - Page 11

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IRCC2.0

Manufacturer Part Number
IRCC2.0
Description
Infrared Communications Controller
Manufacturer
SMSC Corporation
Datasheet
Bit Rate Divider
The Transmit and Receive Bit Rate Divider
register is used to extract a serial NRZ data
stream for the IrCC 2.0 SCE. The divider is eight
bits wide.
The input clock to the Bit Rate Divider is 100kHz
(Carrier Frequency Divider input clock ÷ 16).
The
relationship
CFD
001
005
009
013
017
021
025
029
033
037
041
045
049
053
057
061
Fc (kHz)
800.000
266.667
160.000
114.286
88.889
72.727
61.538
53.333
47.059
42.105
38.095
34.783
32.000
29.630
27.586
25.806
between
Table 9 - Representative Carrier Frequencies
CFD
the
065
069
073
077
081
085
089
093
097
101
105
109
113
117
121
125
Bit
Fc (kHz)
24.242
22.857
21.622
20.513
19.512
18.605
17.778
17.021
16.327
15.686
15.094
14.545
14.035
13.559
13.115
12.698
Rate
11
CFD
129
133
137
141
145
149
153
157
161
165
169
173
177
181
185
189
Divider (BRD) and the Bit Rate (Fb) is as follows:
For example, program the Bit Rate Divider with
55 ('37'Hex) for a .562ms Remote Control bit cell:
Fb = 1.786kHz. This is ~.5% accuracy. Table 10
contains representative BRD vs. Bit Rate
relationships. The Bit Rate range is 100kHz to
390.625Hz.
Fc (kHz)
12.308
11.940
11.594
11.268
10.959
10.667
10.390
10.127
9.877
9.639
9.412
9.195
8.989
8.791
8.602
8.421
BRD = (.1MHz/Fb) - 1
CFD
193
197
201
205
209
213
217
221
225
229
233
237
241
245
249
253
Fc (kHz)
8.247
8.081
7.921
7.767
7.619
7.477
7.339
7.207
7.080
6.957
6.838
6.723
6.612
6.504
6.400
6.299

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