IRCC2.0 SMSC Corporation, IRCC2.0 Datasheet - Page 38

• Manufacturer Part Number: IRCC2.0
• Description: Infrared Communications Controller
• Manufacturer: SMSC Corporation

REGISTER BLOCK TWO
Register Block Two contains the Consumer IR
Consumer IR Control Register (Address 0)
Sync Bit, bit 7
The Sync Bit enables the receiver bit-rate clock
synchronization mechanism. When the Sync bit
is one, receiver edge synchronization is enabled
(see the Receiver Bit Cell Synchronization
section on page 13).
Carrier Off, bit 2
The Carrier Off bit bypasses the Consumer IR
Carrier
Frequency Divider section on page 10). When
the Carrier Off bit is one, the transmitter outputs
a non-modulated SCE NRZ serial data stream at
the programmed bit rate. Also, when the Carrier
Off bit is one, the receiver does not attempt to
demodulate a carrier from the incoming data
stream and samples the state of the PIN diode at
the programmed bit rate.
A2
0
0
0
0
1
1
1
Address
A1
0
0
1
1
0
0
1
generator/receiver
A0
0
1
0
1
0
1
0
Direction
R/W
R/W
R/W
(see
sync
D7
bit
Table 26 - Register Block Two
the
D6
Consumer IR (Remote Control) Control Register
Carrier
Consumer IR Carrier Rate Register
Consumer IR Bit Rate Register
D5
reserved
38
(Remote Control) encoder/decoder configuration
registers (Table 26).
Carrier Range, bits 0 - 1
The Consumer IR Carrier Range Bits set the
carrier detect sensitivity of the receiver.
effects of this register are shown in Table 11.
Consumer IR Carrier Rate Register
(Address 1)
The
programs the ASK carrier frequency divider. The
effects of this register are shown in Table 9.
Consumer IR Bit Rate Register (Address 2)
The Consumer IR Bit Rate Register programs
the transmit and receive bit-rate divider.
effects of this register are shown in Table 10.
Description
D4
reserved
reserved
reserved
reserved
Consumer
D3
carrier
D2
off
IR
Carrier
carrier range
D1
bits
D0
Rate
Default
'00'hex
'29'hex
'37'hex
Register
The
The