IRCC2.0 SMSC Corporation, IRCC2.0 Datasheet - Page 43

• Manufacturer Part Number: IRCC2.0
• Description: Infrared Communications Controller
• Manufacturer: SMSC Corporation

programmable from 0ms to 25.5ms in 100µs
intervals. The IR Half Duplex Timeout register
behaves like the other Legacy Chip-Level
Controls described in the Interface Description;
i.e., the IR Half Duplex Timeout is uniformly
updated in the IrCC 2.0 and the chip-level
configuration
registers are explicitly written using IOW or
following a POR. IrCC 2.0 software resets do not
affect the IR Half Duplex Timeout register. The
effects of the IR Half Duplex Timeout apply to the
SCE receiver/transmitter as well as the ACE
receiver/transmitter. The IR Half Duplex Timeout
applies to all SCE encoder/decoder types except
for the RAW Mode.
registers
when
either set of
43
SCE Transmit Delay Timer Register
(Address 2)
SCE Transmit Delay Timer, bits 0 - 6
The SCE Transmit Delay Timer delays the
internal activation of the SCE transmitter (Tx
Enable)
following a transmit command (see the Transmit
Timing
commands are issued using the SCE Modes
bits.
programmable from 0ms to 12.70ms in 100µS
intervals. The relationship of the SCE Transmit
Delay Timer Register (T
Delay Time (T
The SCE Transmit Delay Timer applies to all
SCE encoder types except for the RAW Mode
encoder.
The
section
by a programmable
SCE
delay
T
delay
) is given by:
on
Transmit
= T
reg
page
reg
• 100µS
) to the SCE Transmit
Delay
61).
time
Timer
Transmit
interval
is