IRCC2.0 SMSC Corporation, IRCC2.0 Datasheet - Page 83

• Manufacturer Part Number: IRCC2.0
• Description: Infrared Communications Controller
• Manufacturer: SMSC Corporation

TRANSMIT PULSE WIDTH LIMIT
The Transmit Pulse Width Limit reduces the risk
of thermal damage to the transmit LED during
message transactions or from the unpredictable
affects that can occur during a power-on-reset.
The Transmit Pulse Width Limit hardware is
controlled by the TX PW LIMIT bit (see Tx PW
Limit, bit 6, on page 36). The Transmit Pulse
Width Limit hardware must apply to all encoders,
particularly the Consumer IR Encoder and the
RAW Mode encoder (Figure 51).
When the TX PW LIMIT bit is high, active Tx
levels trigger the Transmit Pulse Width Limit
TX PW LIMIT OUT
TX PW LIMIT IN
FIGURE 52 - TRANSMIT PULSE WIDTH LIMIT EXAMPLE
100us
83
hardware. If an active Tx pulse goes inactive
before 100Fs, the Transmit Pulse Width Limit
hardware is deactivated until the next active Tx
level. If the transmit pulse exceeds 100Fs, the
hardware deactivates Tx for 300Fs and cannot
re-activate it until the input to the Transmit Pulse
Width Limit hardware has gone inactive and
active again (Figure 52). When the TX PW LIMIT
bit is low, the Transmit Pulse Width Limit
hardware is disabled.
APPLICATION NOTE: the Transmit Pulse Width
Limit
Consumer IR carriers (≤ 5kHz) or unmodulated
low frequency Consumer IR bit rates.
300us
can
seriously
distort
low
frequency