IRCC2.0 SMSC Corporation, IRCC2.0 Datasheet - Page 5

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IRCC2.0

Manufacturer Part Number
IRCC2.0
Description
Infrared Communications Controller
Manufacturer
SMSC Corporation
Datasheet
Fast
The Fast pin always reflects the state of Fast, bit
6 of SCE Line Control Register A. The state of
Fast is independent of the IrCC 2.0 Block
Controls or the Output Multiplexer. The Fast pin
can be used at the chip level for IR Transceiver
configuration.
IOCHRDY
nDACK
nSRDY
NAME
D0-D7
A0-A2
nIOW
nIOR
DRQ
AEN
IRQ
TC
GP Data
NAME
Fast
SIZE (BITS)
8
3
1
1
1
1
1
1
1
1
1
SIZE (BITS)
1
1
Table 4 - G. P. Port Signals
Bi-directional
Table 5 - HOST Signals
Output
Output
Output
Output
TYPE
Input
Input
Input
Input
Input
Input
Output
Output
TYPE
5
GP Data
The G.P. Data pin typically reflects the state of
General Purpose Data, bit 5 of SCE Line Control
Register A.
independent of the IrCC 2.0 Block Controls or
the Output Multiplexer but will depend on the
ATC during transceiver programming cycles (see
the Automatic Transceiver Control section on
page 69).
ISA I/O Write
DMA Request
Interrupt Request
ISA I/O Channel Ready
ISA Synchronous Ready (Zero Wait State)
Host Data Bus
IrCC 2.0 Register Address Bus
ISA I/O Read
ISA Address Enable
ISA DMA Acknowledge
ISA DMA Terminal Count
General Purpose Data
General Purpose Data
DESCRIPTION
DESCRIPTION
The state of G.P. Data is

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