mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1155

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mcf51jf128

Manufacturer Part Number
mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Reset
44.3.14 SAI Receive Configuration 4 Register (I2Sx_RCR4)
This register cannot be altered when the receive enable bit is set.
Addresses: I2S0_RCR4 is FFFF_8200h base + 90h offset = FFFF_8290h
Freescale Semiconductor, Inc.
Bit
W
R
Reserved
Reserved
Reserved
Reserved
31
0
SYWD
WDFL
31–17
31–20
19–16
15–13
FRSZ
15–4
12–8
Field
RCE
Field
3–0
16
30
0
29
0
28
0
This read-only bitfield is reserved and always has the value zero.
Receive channel enable
Enables a data channel for a receive operation. A channel must be enabled before its FIFO can be
accessed.
0
1
This read-only bitfield is reserved and always has the value zero.
Word flag configuration
Configures which word the start of word flag is set. The value written should be one less than the word
number (for example, write zero to configure for the first word in the frame). When configured to a value
greater than the Frame Size field, then the start of word flag is never set.
This read-only bitfield is reserved and always has the value zero.
Frame size
Configures the number of words in each frame. The value written should be one less than the number of
words in the frame (for example, write 0 for one word per frame). The maximum supported frame size is
16 words.
This read-only bitfield is reserved and always has the value zero.
Sync width
Configures the length of the frame sync in number of bit clocks. The value written should be one less than
the number of bit clocks (for example, write 0 for the frame sync to assert for one bit clock only). The sync
width cannot be configured longer than the first word of the frame.
27
0
Receive data channel is disabled.
Receive data channel is enabled.
26
0
0
25
0
24
0
MCF51JF128 Reference Manual, Rev. 2, 03/2011
23
0
22
0
Chapter 44 Integrated Interchip Sound (I2S) / Synchronous Audio Interface (SAI)
I2Sx_RCR3 field descriptions
I2Sx_RCR4 field descriptions
21
0
Table continues on the next page...
20
0
19
0
FRSZ
18
0
Preliminary
17
0
16
0
15
0
Description
Description
14
0
0
13
0
12
0
11
0
SYWD
10
0
0
9
0
8
0
7
0
0
6
0
5
4
0
0
3
0
0
2
0
1
1155
0
0

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