mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 147

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Freescale Semiconductor, Inc.
ERCLK2
IRC (fast and slow)
Core clock (CPUCLK)
Fixed frequency clock
Bus clock (BUSCLK)
Background Debug
External reference
External reference
Internal reference
FLL Output clock
PLL output clock
(MCGBDCCLK)
Controller clock
(MCGPLLCLK)
(MCGFLLCLK)
MCGOUTCLK
(MCGFFCLK)
System clock
(MCGIRCLK)
Clock name
(SYSCLK)
(ERCLK1)
(ERCLK2)
LPO
MCG External Input clock options
Up to 50 MHz
Up to 50 MHz
Up to 50 MHz
Up to 25 MHz
Up to 39.0625 kHz
Up to 50 MHz
Up to 50 MHz
Up to 50 MHz
30-40kHz or 2 MHz
Up to 50 MHz
(bypass),
30-40 kHz (low-range
crystal), or
4-32 MHz (high-
rangecrystal)
Up to 50 MHz
(bypass),
30-40 kHz (low-range
crystal), or
4-32 MHz (high-
rangecrystal)
1 kHz
Run mode
clock frequency
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Table 5-1. Input clocks for the MCG
Table 5-2. Device Clock Summary
Table continues on the next page...
Up to 2 MHz
Up to 2 MHz
Up to 2 MHz
Up to 1 MHz
N/A
N/A
N/A
N/A
2 MHz only
Up to 4 MHz (bypass),
30-40 kHz (low-range
crystal) or
Up to 4 MHz (high-
range crystal)
Up to 4 MHz (bypass),
30-40 kHz (low-range
crystal) or
Up to 4 MHz (high-
range crystal)
1 kHz
VLPR mode
clock frequency
Preliminary
OSC2 Output, Crystal or External Clock
Internal reference of the MCG
MCG
System clock
MCGOUTCLK clock
divider
MCGOUTCLK clock
divider
MCGIRCCLK or
ERCLK2
MCG
MCG
MCG
Internal Source
OSC1
OSC2
PMC
Clock source
Description
Chapter 5 Clock Distribution
In all stop modes
In wait and all stop
modes
In all stop modes
In all stop modes
In all stop modes
In all stop modes
In all stop modes
In all stop modes
MCG IRCLKEN
disabled,
Stop mode and MCG
IRSTEN disabled, or
VLPS/LLS/VLLS mode
OSC1 ERCLKEN1 is
disabled
OSC2 ERCLKEN2 is
disabled
Never
Clock is disabled
when…
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