mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 965

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mcf51jf128

Manufacturer Part Number
mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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39.4.8 OTG Control Register (USBx_OTGCTL)
The OTG Control Register controls the operation of VBUS and Data Line termination
resistors.
Addresses: USB0_OTGCTL is FFFF_9000h base + 1Ch offset = FFFF_901Ch
Freescale Semiconductor, Inc.
Reserved
Reserved
Reserved
DPHIGH
DMLOW
DPLOW
OTGEN
Reset
Field
Read
1–0
Write
7
6
5
4
3
2
Bit
DPHIGH
D+ Data Line pullup resistor enable
0
1
This read-only bit is reserved and always has the value zero.
D+ Data Line pull-down resistor enable
This bit should always be enabled together with bit 4 (DMLOW)
0
1
D- Data Line pull-down resistor enable
0
1
This read-only bit is reserved and always has the value zero.
On-The-Go pullup/pulldown resistor enable
0
1
This read-only bitfield is reserved and always has the value zero.
7
0
D+ pullup resistor is not enabled
D+ pullup resistor is enabled
D+ pulldown resistor is not enabled.
D+ pulldown resistor is enabled.
D- pulldown resistor is not enabled.
D- pulldown resistor is enabled.
If USB_EN is set and HOST_MODE is clear in the Control Register (CTL), then the D+ Data Line pull-
up resistors are enabled. If HOST_MODE is set the D+ and D- Data Line pull-down resistors are
engaged.
The pull-up and pull-down controls in this register are used.
0
0
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
USBx_OTGCTL field descriptions
DPLOW
0
5
Preliminary
DMLOW
0
4
Description
Chapter 39 Universal Serial Bus (USB) Controller
0
0
3
OTGEN
0
2
0
1
0
0
0
965

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