mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1293

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

50.4.1.5 BDM Command Set Summary
The following table summarizes the BDM command set. Subsequent paragraphs contain
detailed descriptions of each command. The nomenclature below is used in the following
table to describe the structure of the BDM commands. Commands begin with an 8-bit
hexadecimal command code in the host-to-target direction (most significant bit first)
Freescale Semiconductor, Inc.
MCMD
CRG
Field
CRN
3–2
1–0
7–6
4–0
SZ
Memory operand size. Defines the size of the memory reference.
00 8-bit byte
01 16-bit word
10 32-bit long
Memory command. Defines the type of the memory reference to be performed.
00 Simple write if R/W = 0; simple read if R/W = 1
01 Write + status if R/W = 0; read + status if R/W = 1
10 Fill if R/W = 0; dump if R/W = 1
11 Fill + status if R/W = 0; dump + status if R/W = 1
Core register group. Defines the core register group to be referenced.
01 CPU's general-purpose registers (An, Dn) or PST trace buffer
10 Debug's control registers
11 CPU's control registers (PC, SR, VBR, CPUCR,...)
Core register number. Defines the specific core register (its number) to be referenced. All other CRN values are
reserved.
Description
Table 50-39. BDM Command Field Descriptions (continued)
MCF51JF128 Reference Manual, Rev. 2, 03/2011
CRG
01
10
11
Preliminary
0x00–0x07
0x08–0x0F
0x10–0x1B
0x0E
CRN
0x00
0x01
0x02
0x04
0x05
0x06
0x0F
DRc[4:0] as described in CSR
PST Buffer 0–11
OTHER_A7
Register
CPUCR
MACSR
MASK
D0–7
A0–7
VBR
ACC
SR
PC
Chapter 50 Debug
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