HYB39S256400T-10 SIEMENS [Siemens Semiconductor Group], HYB39S256400T-10 Datasheet - Page 30
HYB39S256400T-10
Manufacturer Part Number
HYB39S256400T-10
Description
256 MBit Synchronous DRAM
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
1.HYB39S256400T-10.pdf
(56 pages)
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6. Write and Read Interrupt
6.1. Write Interrupted by a Write
6.2. Write Interrupted by a Read
Semiconductor Group
(Burst Length = 4, CAS latency = 2, 3)
CLK
Command
DQ’s
t
t
(Burst Length = 4, CAS latency = 2, 3)
CLK
Command
CAS
latency = 2
CAS
latency = 3
CK2
CK3
, DQ’s
, DQ’s
T0
T0
NOP
NOP
Input data for the Write is ignored.
Write A
Write A
T1
T1
DIN A0
DIN A0
DIN A0
1 Clk Interval
Read B
Write B
T2
don’t care
don’t care
T2
DIN B0
T3
don’t care
T3
NOP
DIN B1
NOP
30
T4
DOUT B0
T4
DIN B2
NOP
NOP
256 MBit Synchronous DRAM
T5
Input data must be removed from the DQ’s
at least one clock cycle before the Read data
appears on the outputs to avoid data contention.
DOUT B0
DOUT B1
T5
DIN B3
NOP
NOP
HYB 39S256400/800/160T
T6
DOUT B2
DOUT B1
T6
NOP
NOP
T7
DOUT B3
DOUT B2
T7
NOP
NOP
T8
DOUT B3
1998-10-01
T8
NOP
NOP
SPT03791
SPT03719
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