HD64F7144F50V Renesas Electronics America, HD64F7144F50V Datasheet - Page 190

• Manufacturer Part Number: HD64F7144F50V
• Description: IC SUPERH MCU FLASH 256K 112QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7144r

Specifications of HD64F7144F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

9. Bus State Controller (BSC)
9.5
9.5.1
BCR1 is a 16-bit readable/writable register that enables access to the MTU control registers and
specifies the bus size of each CS space. When using the SH7144, specify the bus size as word (16-
bit) or smaller size.
Write bits 7 to 0 of BCR1 during the initialization stage after a power-on reset, and do not change
the values thereafter. In on-chip ROM enabled mode, do not access any of each CS space until
completion of register initialization. In on-chip ROM disabled mode, do not access CS spaces
other than CS0 and CS4 until completion of register initialization.
Rev.4.00 Mar. 27, 2008 Page 144 of 882
REJ09B0108-0400
Bit
15
14
13
12 to 8 ⎯
7
Bit Name Initial Value R/W
⎯
⎯
MTURWE 1
A3LG
Register Descriptions
Bus Control Register 1 (BCR1)
0
1
All 0
0
R
R
R/W
R
R/W
Description
Reserved
This bit is always read as 0. The write value should
always be 0.
Reserved
This bit is always read as 1. The write value should
always be 1.
MTU read/write enable
This bit enables MTU control register access. For details,
refer to section 11, Multi-Function Timer Pulse Unit
(MTU).
0: MTU control register access is disabled
1: MTU control register access is enabled
Reserved
These bits are always read as 0. The write value should
always be 0.
CS3 and CS7 space longword
This bit specifies the CS3 and CS7 space bus size. This
bit is valid only for the SH7145.
This bit is reserved in SH7144. This bit is always read as
0 and should always be written with 0.
0: Depends on the value set with the A3SZ bit in this
1: Longword (32 bits)
register.